In this section
This section describes the FPGA load.
Loading the FPGA
The FPGA on the accelerator must be loaded when the host boots, so the accelerator can be assigned addresses in the host memory map. The FPGA is loaded automatically with an image from the flash memory on the accelerator.
Image at power up
The primary image is loaded at power-up of the host, but if loading of this image fails, then the secondary image is loaded instead.
References
DN-0379
Napatech, NT Accelerators with Napatech Software Suite, Software Installation for Linux, Software Installation Guide
DN-0449
Napatech, Napatech Software Suite, Reference Documentation
DN-0487
Napatech, NT Accelerators, Handling FPGA Images, User Guide
DN-0810
Napatech, NT 4GA Accelerators with Napatech Software Suite, Software Architecture,
Overview Document
DN-0985
Napatech, NT 4GA Accelerators with Napatech Software Suite, Time-Stamping and Time Synchronization, User Guide
DN-0988
Napatech, NT 4GA Accelerators with Napatech Software Suite, Multi-CPU Distribution, User Guide
DN-1067
Napatech, NT 4GA Accelerators with Napatech Software Suite and WinPcap, Software
Installation for Windows, Software Installation Guide
PCIe3.0
PCI Express Base Specification Rev. 3.0