stream_info_compat.h Source File

1 /*

2  *

3  * Copyright (C) 2025 Napatech A/S.

4  * All rights reserved.

5  *

6  * Redistribution and use in source and binary forms, with or without

7  * modification, are permitted provided that the following conditions are met:

8  * * Redistributions of source code must retain the above copyright

9  * notice, this list of conditions and the following disclaimer.

10  * * Redistributions in binary form must reproduce the above copyright

11  * notice, this list of conditions and the following disclaimer in the

12  * documentation and/or other materials provided with the distribution.

13  * * Neither the name of the Napatech A/S nor the

14  * names of its contributors may be used to endorse or promote products

15  * derived from this software without specific prior written permission.

16  *

17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND

18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED

19  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE

20  * DISCLAIMED. IN NO EVENT SHALL NAPATECH A/S BE LIABLE FOR ANY

21  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

22  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;

23  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND

24  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS

26  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

27  *

28  *

29 

30  */

31 

32 /**

33  * @file

34  *

35  * This is the header file of the STREAMTYPE_INFO interface containing

36  * included for backward compatibility structures.

37  *

38  */

39 #ifndef __STREAM_INFO_COMPAT_H__

40 #define __STREAM_INFO_COMPAT_H__

41 

42 #if !defined(_NT_NTAPI_NO_COMPAT)

43 

44 /***********************************************************************************************/

45 /* Info wismode version 0 */

46 /***********************************************************************************************/

47 /**

48  * Structure to hold information about WIS mode

49  */

50 struct NtInfoWis_s {

51  int supported; //!< Is WIS mode supported by the adapter - 1 supported, 0: not supported

52  enum NtWISMode_e mode; //!< Is WIS mode enabled

53 };

54 

55 

56 /***********************************************************************************************/

57 /* Adapter info version 0 */

58 /***********************************************************************************************/

59 #define NT_INFO_CMD_READ_ADAPTER NT_INFO_CMD_READ_COMPAT_0 //!< Adapter info - the number of sensors, ports, PCI ID and bus ID

60 /**

61  * This structure will return the adapter specific info

62  */

63 struct NtInfoAdapter_s {

64  uint8_t numSensors; //!< The number of sensors on this adapter

65  uint8_t Reserved1[3];

66  uint8_t numLevel1Sensors; //!< The number of level 1 sensors on this adapter

67  uint8_t Reserved2[3];

68  uint8_t portOffset; //!< The port numbers of this adapter start at this port offset

69  uint8_t Reserved3[3];

70  uint8_t numPorts; //!< The number of ports on this adapter

71  uint8_t Reserved4[3];

72  uint8_t numPhysicalAdapters; //!< The number of physical adapters grouped in this logical adapter

73  uint8_t Reserved5[3];

74  uint32_t numHostBuffersRx; //!< The number of RX host buffers on this adapter

75  uint32_t numHostBuffersTx; //!< The number of TX host buffers on this adapter

76  uint32_t numTsConnectors; //!< The number of time sync connectors on this adapter

77  enum NtAdapterType_e adapterType; //!< The adapter type

78  enum NtProductType_e productType; //!< The product line type

79  enum NtProfileType_e profile; //!< The profile the adapter is using

80  enum NtProductFamily_e productFamily; //!< The product family

81  char name[128]; //!< The adapter name

82  char serialNo[50]; //!< The adapter serial number

83  /**

84  * AVR version for Gen2 adapters:

85  * avr[0] = Main board AVR,

86  * avr[1] = Front board AVR

87  */

88  struct NtversionAvr_s avr;

89  /**

90  * The bus ID is read as:

91  * 32-bit value,

92  * 4 x 8-bit values defining

93  * function,

94  * device,

95  * bus and

96  * slot

97  */

98  union Ntbusid_u {

99  struct Ntbusid_s {

100  uint32_t function:8; //!< The PCI function number

101  uint32_t device:8; //!< The PCI device number

102  uint32_t bus:8; //!< The PCI bus number

103  uint32_t slot:8; //!< The PCI slot number

104  }s;

105  uint32_t value; //!< The slot, bus, device and function as a 32-bit value

106  } busid;

107 

108  /**

109  * PCI ID is read as:

110  * 32-bit value,

111  * 2 x 16-bit values defining

112  * device ID and

113  * vendor ID

114  */

115  union Ntpciid_u pciid;

116  /**

117  * The FPGA ID of the image currently running on the adapter.

118  * The format is: item-product-version-revision-build.

119  * For example, 200-9114-40-01-1023.

120  */

121  union Ntfpgaid_u fpgaid;

122  uint32_t extendedDescriptor; //!< Is the adapter running with extended descriptors

123  enum NtPacketDescriptorType_e descriptorType; //!< The descriptor type used

124  enum NtTimestampType_e timestampType; //!< The timestamp type used by the adapter

125  enum NtTimestampMethod_e timestampMethod; //!< The timestamp method (SOF/EOF) used by the adapter

126 };

127 

128 /**

129  * NT_INFO_CMD_READ_ADAPTER specific data.

130  * The adapterNo must be initialized for the relevant adapter.

131  */

132 struct NtInfoCmdAdapter_s {

133  uint8_t adapterNo; //!< The adapter to query

134  uint8_t Reserved1[3];

135  struct NtInfoAdapter_s data; //!< The adapter data

136 };

137 

138 /***********************************************************************************************/

139 /* Adapter info version 1 */

140 /***********************************************************************************************/

141 #define NT_INFO_CMD_READ_ADAPTER_V1 NT_INFO_CMD_READ_COMPAT_5 //!< Adapter info - the number of sensors, ports, PCI ID and bus ID

142 /**

143  * This structure will return the adapter specific info

144  */

145 struct NtInfoAdapter_v1_s {

146  uint8_t numSensors; //!< The number of sensors on this adapter

147  uint8_t Reserved1[3];

148  uint8_t numLevel1Sensors; //!< The number of level 1 sensors on this adapter

149  uint8_t Reserved2[3];

150  uint8_t portOffset; //!< The port numbers of this adapter start at this port offset

151  uint8_t Reserved3[3];

152  uint8_t numPorts; //!< The number of ports on this adapter

153  uint8_t Reserved4[3];

154  uint8_t numPhysicalAdapters; //!< The number of physical adapters grouped in this logical adapter

155  uint8_t Reserved5[3];

156  uint32_t numHostBuffersRx; //!< The number of RX host buffers on this adapter

157  uint32_t numHostBuffersTx; //!< The number of TX host buffers on this adapter

158  uint32_t numTsConnectors; //!< The number of time sync connectors on this adapter

159  enum NtAdapterType_e adapterType; //!< The adapter type

160  enum NtProductType_e productType; //!< The product line type

161  enum NtProfileType_e profile; //!< The profile the adapter is using

162  uint32_t supportedProfilesBitmask; //!< The profiles supported by the adapter - the value is represented as a bitmask of @ref NtProfileType_e values

163  enum NtProductFamily_e productFamily; //!< The product family

164  char name[128]; //!< The adapter name

165  char serialNo[50]; //!< The adapter serial number

166  /**

167  * AVR version for Gen2 adapters:

168  * avr[0] = Main board AVR,

169  * avr[1] = Front board AVR

170  */

171  struct NtversionAvr_s avr;

172  /**

173  * The bus ID is read as:

174  * 32-bit value,

175  * 4 x 8-bit values defining

176  * function,

177  * device,

178  * bus and

179  * slot

180  */

181  union Ntbusid_v1_u {

182  struct Ntbusid_v1_s {

183  uint32_t function:8; //!< The PCI function number

184  uint32_t device:8; //!< The PCI device number

185  uint32_t bus:8; //!< The PCI bus number

186  uint32_t slot:8; //!< The PCI domain number

187  }s;

188  uint32_t value; //!< The domain, bus, device and function as a 32-bit value

189  } busid;

190  /**

191  * PCI ID is read as:

192  * 32-bit value,

193  * 2 x 16-bit values defining

194  * device ID and

195  * vendor ID

196  */

197  union Ntpciid_u pciid;

198  /**

199  * The FPGA ID of the image currently running on the adapter.

200  * The format is: item-product-version-revision-build.

201  * For example, 200-9114-40-01-1023.

202  */

203  union Ntfpgaid_u fpgaid;

204  uint32_t extendedDescriptor; //!< The extended descriptor in use by RX - if 0 then no extended is used

205  uint32_t supportedExtendedDescriptorsBitmask; //!< Bitmask of supported extended descriptors, for example, if bit 7 is set then extended descriptor 7 is supported, and if bit 8 it set then extended descriptor 8 is supported

206  enum NtPacketDescriptorType_e descriptorType; //!< The descriptor type used

207  enum NtTimestampType_e timestampType; //!< The time stamp type used by the adapter

208  enum NtTimestampMethod_e timestampMethod; //!< The time stamp method (SOF/EOF) used by the adapter

209 

210  enum NtTxTimingMethod_e txTiming; //!< The TX timing

211  struct NtInfoWis_s wisMode;

212  enum NtTimestampInjectOffsetMode_e tsInjectModeOffset; //!< Time stamp injection offset mode

213  struct NtInfoGlobalSync_s globalSync; //!< Global sync status

214 };

215 

216 /**

217  * NT_INFO_CMD_READ_ADAPTER_V1 specific data.

218  * The adapterNo must be initialized for the relevant adapter.

219  */

220 struct NtInfoCmdAdapter_v1_s {

221  uint8_t adapterNo; //!< The adapter to query

222  uint8_t Reserved1[3];

223  struct NtInfoAdapter_v1_s data; //!< The adapter data

224 };

225 

226 /***********************************************************************************************/

227 /* Adapter info version 2 */

228 /***********************************************************************************************/

229 #define NT_INFO_CMD_READ_ADAPTER_V2 NT_INFO_CMD_READ_COMPAT_7 //!< Adapter info - the number of sensors, ports, PCI ID and bus ID

230 /**

231  * This structure will return the adapter specific info version 2.

232  * Must be a mirror of NtInfoAdapter_s with version 2 variables added

233  * to the bottom.

234  */

235 struct NtInfoAdapter_v2_s {

236  uint8_t numSensors; //!< The number of sensors on this adapter

237  uint8_t Reserved1[3];

238  uint8_t numLevel1Sensors; //!< The number of level 1 sensors on this adapter

239  uint8_t Reserved2[3];

240  uint8_t portOffset; //!< The port numbers of this adapter start at this port offset

241  uint8_t Reserved3[3];

242  uint8_t numPorts; //!< The number of ports on this adapter

243  uint8_t Reserved4[3];

244  uint8_t numPhysicalAdapters; //!< The number of physical adapters grouped in this logical adapter

245  uint8_t Reserved5[3];

246  uint32_t numHostBuffersRx; //!< The number of RX host buffers on this adapter

247  uint32_t numHostBuffersTx; //!< The number of TX host buffers on this adapter

248  uint32_t numTsConnectors; //!< The number of time sync connectors on this adapter

249  enum NtAdapterType_e adapterType; //!< The adapter type

250  enum NtProductType_e productType; //!< The product line type

251  enum NtProfileType_e profile; //!< The profile the adapter is using

252  uint32_t supportedProfilesBitmask; //!< The profiles supported by the adapter - the value is represented as a bitmask of @ref NtProfileType_e values

253  uint32_t adapterFeatures; //!< The features supported by the adapter - the value is represented as a bitmask of @ref NtFeatureType_e values

254  enum NtProductFamily_e productFamily; //!< The product family

255  char name[128]; //!< The adapter name

256  char serialNo[50]; //!< The adapter serial number

257  /**

258  * AVR version for Gen2 adapters:

259  * avr[0] = Main board AVR,

260  * avr[1] = Front board AVR

261  */

262  struct NtversionAvr_s avr;

263 

264  /**

265  * The bus ID is read as:

266  * 32-bit value,

267  * 4 x 8-bit values defining

268  * function,

269  * device,

270  * bus and

271  * slot

272  */

273  union Ntbusid_v2_u {

274  struct Ntbusid_v2_s {

275  uint32_t function:8; //!< The PCI function number

276  uint32_t device:8; //!< The PCI device number

277  uint32_t bus:8; //!< The PCI bus number

278  uint32_t slot:8; //!< The PCI slot number

279  }s;

280  uint32_t value; //!< The slot, bus, device and function as a 32-bit value

281  } busid;

282  /**

283  * PCI ID is read as:

284  * 32-bit value,

285  * 2 x 16-bit values defining

286  * device ID and

287  * vendor ID

288  */

289  union Ntpciid_u pciid;

290  struct NtInfoPCIeInfo_s pciInfo; //!< Information about the PCI bus.

291  /**

292  * The FPGA ID of the image currently running on the adapter.

293  * The format is: item-product-version-revision-build.

294  * For example, 200-9114-40-01-1023.

295  */

296  union Ntfpgaid_u fpgaid;

297  struct NtInfoSDRAMInfo_s sdramInfo; //!< The SDRAM information

298  uint32_t extendedDescriptor; //!< The extended descriptor in use by RX - if 0 then no extended is used

299  uint32_t supportedExtendedDescriptorsBitmask; //!< Bitmask of supported extended descriptors, for example, if bit 7 is set then extended descriptor 7 is supported, and if bit 8 it set then extended descriptor 8 is supported

300  enum NtPacketDescriptorType_e descriptorType; //!< The descriptor type used

301  enum NtTimestampType_e timestampType; //!< The time stamp type used by the adapter

302  enum NtTimestampMethod_e timestampMethod; //!< The time stamp method (SOF/EOF) used by the adapter

303  enum NtTxTimingMethod_e txTiming; //!< The TX timing

304  struct NtInfoWis_s wisMode;

305  enum NtTimestampInjectOffsetMode_e tsInjectModeOffset; //!< Time stamp injection offset mode

306  struct NtInfoGlobalSync_s globalSync; //!< Global sync status

307 };

308 

309 /**

310  * NT_INFO_CMD_READ_ADAPTER_V2 specific data.

311  * The adapterNo must be initialized for the relevant adapter.

312  */

313 struct NtInfoCmdAdapter_v2_s {

314  uint8_t adapterNo; //!< The adapter to query

315  uint8_t Reserved1[3];

316  struct NtInfoAdapter_v2_s data; //!< The adapter data

317 };

318 

319 /***********************************************************************************************/

320 /* Adapter info version 3 */

321 /***********************************************************************************************/

322 #define NT_INFO_CMD_READ_ADAPTER_V3 NT_INFO_CMD_READ_COMPAT_11 //!< Adapter info - the number of sensors, ports, PCI ID and bus ID

323 

324 /**

325  * This structure will return the adapter specific info version 3.

326  * Must be a mirror of NtInfoAdapter_s with version 3 variables added

327  * to the bottom.

328  */

329 struct NtInfoAdapter_v3_s {

330  uint8_t numSensors; //!< The number of sensors on this adapter

331  uint8_t Reserved1[3];

332  uint8_t numLevel1Sensors; //!< The number of level 1 sensors on this adapter

333  uint8_t Reserved2[3];

334  uint8_t portOffset; //!< The port numbers of this adapter start at this port offset

335  uint8_t Reserved3[3];

336  uint8_t numPorts; //!< The number of ports on this adapter

337  uint8_t Reserved4[3];

338  uint8_t numPhysicalAdapters; //!< The number of physical adapters grouped in this logical adapter

339  uint8_t Reserved5[3];

340  uint32_t numHostBuffersRx; //!< The number of RX host buffers on this adapter

341  uint32_t numHostBuffersTx; //!< The number of TX host buffers on this adapter

342  uint32_t numTsConnectors; //!< The number of time sync connectors on this adapter

343  enum NtAdapterType_e adapterType; //!< The adapter type

344  enum NtProductType_e productType; //!< The product line type

345  enum NtProfileType_e profile; //!< The profile the adapter is using

346  uint32_t supportedProfilesBitmask; //!< The profiles supported by the adapter - the value is represented as a bitmask of @ref NtProfileType_e values

347  uint32_t adapterFeatures; //!< The features supported by the adapter - the value is represented as a bitmask of @ref NtFeatureType_e values

348  enum NtProductFamily_e productFamily; //!< The product family

349  char name[128]; //!< The adapter name

350  char serialNo[50]; //!< The adapter serial number

351  /**

352  * AVR version for Gen2 adapters:

353  * avr[0] = Main board AVR,

354  * avr[1] = Front board AVR

355  */

356  struct NtversionAvr_s avr;

357 

358  /**

359  * The bus ID of the device

360  */

361  union Ntbusid_v3_u {

362  struct Ntbusid_v3_s {

363  uint32_t function:3; //!< The PCI function number

364  uint32_t device:5; //!< The PCI device number

365  uint32_t bus:8; //!< The PCI bus number

366  uint32_t domain:16; //!< The PCI domain number

367  }s;

368  uint32_t value; //!< The domain, bus, device and function as a 32-bit value

369  } busid;

370  /**

371  * PCI ID is read as:

372  * 32-bit value,

373  * 2 x 16-bit values defining

374  * device ID and

375  * vendor ID

376  */

377  union Ntpciid_u pciid;

378  struct NtInfoPCIeInfo_s pciInfo; //!< Information about the PCI bus.

379  /**

380  * The FPGA ID of the image currently running on the adapter.

381  * The format is: item-product-version-revision-build.

382  * For example, 200-9114-40-01-1023.

383  */

384  union Ntfpgaid_u fpgaid;

385  struct NtInfoSDRAMInfo_s sdramInfo; //!< The SDRAM information

386  uint32_t extendedDescriptor; //!< The extended descriptor in use by RX - if 0 then no extended is used

387  uint32_t supportedExtendedDescriptorsBitmask; //!< Bitmask of supported extended descriptors, for example, if bit 7 is set then extended descriptor 7 is supported, and if bit 8 it set then extended descriptor 8 is supported

388  enum NtPacketDescriptorType_e descriptorType; //!< The descriptor type used

389  enum NtTimestampType_e timestampType; //!< The time stamp type used by the adapter

390  enum NtTimestampMethod_e timestampMethod; //!< The time stamp method (SOF/EOF) used by the adapter

391  enum NtTxTimingMethod_e txTiming; //!< The TX timing

392  struct NtInfoWis_s wisMode;

393  enum NtTimestampInjectOffsetMode_e tsInjectModeOffset; //!< Time stamp injection offset mode

394  struct NtInfoGlobalSync_s globalSync; //!< Global sync status

395 };

396 

397 /**

398  * NT_INFO_CMD_READ_ADAPTER_V3 specific data.

399  * The adapterNo must be initialized for the relevant adapter.

400  */

401 struct NtInfoCmdAdapter_v3_s {

402  uint8_t adapterNo; //!< The adapter to query

403  uint8_t Reserved1[3];

404  struct NtInfoAdapter_v3_s data; //!< The adapter data

405 };

406 

407 

408 /***********************************************************************************************/

409 /* Adapter info version 4 */

410 /***********************************************************************************************/

411 #define NT_INFO_CMD_READ_ADAPTER_V4 NT_INFO_CMD_READ_COMPAT_13 //!< Adapter info - the number of sensors, ports, PCI ID and bus ID

412 

413 enum {

414  AVR_NOT_VALID = 0, //!< No valid AVR data

415  AVR_VALID = 1, //!< Valid AVR data for mainboard and front board has been filled in the structure

416 };

417 

418 /**

419  * This structure will return the adapter specific info version 4.

420  * Must be a mirror of NtInfoAdapter_s with version 4 variables added

421  * to the bottom.

422  */

423 struct NtInfoAdapter_v4_s {

424  uint8_t numSensors; //!< The number of sensors on this adapter

425  uint8_t Reserved1[3];

426  uint8_t numLevel1Sensors; //!< The number of level 1 sensors on this adapter

427  uint8_t Reserved2[3];

428  uint8_t portOffset; //!< The port numbers of this adapter start at this port offset

429  uint8_t Reserved3[3];

430  uint8_t numPorts; //!< The number of ports on this adapter

431  uint8_t Reserved4[3];

432  uint8_t numPhysicalAdapters; //!< The number of physical adapters grouped in this logical adapter

433  uint8_t Reserved5[3];

434  uint32_t numHostBuffersRx; //!< The number of RX host buffers on this adapter

435  uint32_t numHostBuffersTx; //!< The number of TX host buffers on this adapter

436  uint32_t numTsConnectors; //!< The number of time sync connectors on this adapter

437  enum NtAdapterType_e adapterType; //!< The adapter type

438  enum NtProductType_e productType; //!< The product line type

439  enum NtProfileType_e profile; //!< The profile the adapter is using

440  uint32_t supportedProfilesBitmask; //!< The profiles supported by the adapter - the value is represented as a bitmask of @ref NtProfileType_e values

441  uint32_t adapterFeatures; //!< The features supported by the adapter - the value is represented as a bitmask of @ref NtFeatureType_e values

442  enum NtProductFamily_e productFamily; //!< The product family

443  char name[128]; //!< The adapter name

444  char serialNo[50]; //!< The adapter serial number

445  /**

446  * AVR version for Gen2 adapters:

447  * avr[0] = Main board AVR,

448  * avr[1] = Front board AVR

449  */

450  struct NtversionAvr_s avr;

451 

452  /**

453  * The bus ID of the device

454  */

455  union Ntbusid_v4_u {

456  struct Ntbusid_v4_s {

457  uint32_t function:3; //!< The PCI function number

458  uint32_t device:5; //!< The PCI device number

459  uint32_t bus:8; //!< The PCI bus number

460  uint32_t domain:16; //!< The PCI domain number

461  }s;

462  uint32_t value; //!< The domain, bus, device and function as a 32-bit value

463  } busid;

464  /**

465  * PCI ID is read as:

466  * 32-bit value,

467  * 2 x 16-bit values defining

468  * device ID and

469  * vendor ID

470  */

471  union Ntpciid_u pciid;

472  struct NtInfoPCIeInfo_s pciInfo; //!< Information about the PCI bus.

473  /**

474  * The FPGA ID of the image currently running on the adapter.

475  * The format is: item-product-version-revision-build.

476  * For example, 200-9114-40-01-1023.

477  */

478  union Ntfpgaid_u fpgaid;

479  struct NtInfoSDRAMInfo_s sdramInfo; //!< The SDRAM information

480  uint32_t extendedDescriptor; //!< The extended descriptor in use by RX - if 0 then no extended is used

481  uint32_t supportedExtendedDescriptorsBitmask; //!< Bitmask of supported extended descriptors, for example, if bit 7 is set then extended descriptor 7 is supported, and if bit 8 it set then extended descriptor 8 is supported

482  enum NtPacketDescriptorType_e descriptorType; //!< The descriptor type used

483  enum NtTimestampType_e timestampType; //!< The time stamp type used by the adapter

484  enum NtTimestampMethod_e timestampMethod; //!< The time stamp method (SOF/EOF) used by the adapter

485  enum NtTxTimingMethod_e txTiming; //!< The TX timing

486  struct NtInfoWis_s wisMode; //!< Wis mode status

487  enum NtTimestampInjectOffsetMode_e tsInjectModeOffset; //!< Time stamp injection offset mode

488  struct NtInfoGlobalSync_s globalSync; //!< Global sync status

489  NtInfoBondingInfo_t bondingInfo; //!< Adapter Bonding status

490 };

491 

492 /**

493  * NT_INFO_CMD_READ_ADAPTER_V4 specific data.

494  * The adapterNo must be initialized for the relevant adapter.

495  */

496 struct NtInfoCmdAdapter_v4_s {

497  uint8_t adapterNo; //!< The adapter to query

498  uint8_t Reserved1[3];

499  struct NtInfoAdapter_v4_s data; //!< The adapter data

500 };

501 

502 /***********************************************************************************************/

503 /* Adapter info version 5 */

504 /***********************************************************************************************/

505 #define NT_INFO_CMD_READ_ADAPTER_V5 NT_INFO_CMD_READ_COMPAT_17 //!< Adapter info - the number of sensors, ports, PCI ID and bus ID

506 

507 /**

508  * This structure will return the adapter specific info version 5.

509  * Must be a mirror of NtInfoAdapter_v4_s with version 5 variables added

510  * to the bottom.

511  */

512 struct NtInfoAdapter_v5_s {

513  uint8_t numSensors; //!< The number of sensors on this adapter

514  uint8_t Reserved1[3];

515  uint8_t numLevel1Sensors; //!< The number of level 1 sensors on this adapter

516  uint8_t Reserved2[3];

517  uint8_t portOffset; //!< The port numbers of this adapter start at this port offset

518  uint8_t Reserved3[3];

519  uint8_t numPorts; //!< The number of ports on this adapter

520  uint8_t Reserved4[3];

521  uint8_t numPhysicalAdapters; //!< The number of physical adapters grouped in this logical adapter

522  uint8_t Reserved5[3];

523  uint32_t numHostBuffersRx; //!< The number of RX host buffers on this adapter

524  uint32_t numHostBuffersTx; //!< The number of TX host buffers on this adapter

525  uint32_t numTsConnectors; //!< The number of time sync connectors on this adapter

526  enum NtAdapterType_e adapterType; //!< The adapter type

527  enum NtProductType_e productType; //!< The product line type

528  enum NtProfileType_e profile; //!< The profile the adapter is using

529  uint32_t supportedProfilesBitmask; //!< The profiles supported by the adapter - the value is represented as a bitmask of @ref NtProfileType_e values

530  uint32_t adapterFeatures; //!< The features supported by the adapter - the value is represented as a bitmask of @ref NtFeatureType_e values

531  enum NtProductFamily_e productFamily; //!< The product family

532  char name[128]; //!< The adapter name

533  char serialNo[50]; //!< The adapter serial number

534  /**

535  * AVR version for Gen2 adapters:

536  * avr[0] = Main board AVR,

537  * avr[1] = Front board AVR

538  */

539  struct NtversionAvr_s avr;

540 

541  /**

542  * The bus ID of the device

543  */

544  union Ntbusid_v5_u {

545  struct Ntbusid_v5_s {

546  uint32_t function:3; //!< The PCI function number

547  uint32_t device:5; //!< The PCI device number

548  uint32_t bus:8; //!< The PCI bus number

549  uint32_t domain:16; //!< The PCI domain number

550  }s;

551  uint32_t value; //!< The domain, bus, device and function as a 32-bit value

552  } busid;

553  /**

554  * PCI ID is read as:

555  * 32-bit value,

556  * 2 x 16-bit values defining

557  * device ID and

558  * vendor ID

559  */

560  union Ntpciid_u pciid;

561  struct NtInfoPCIeInfo_s pciInfo; //!< Information about the PCI bus.

562  /**

563  * The FPGA ID of the image currently running on the adapter.

564  * The format is: item-product-version-revision-build.

565  * For example, 200-9114-40-01-1023.

566  */

567  union Ntfpgaid_u fpgaid;

568  struct NtInfoSDRAMInfo_s sdramInfo; //!< The SDRAM information

569  uint32_t extendedDescriptor; //!< The extended descriptor in use by RX - if 0 then no extended is used

570  uint32_t supportedExtendedDescriptorsBitmask; //!< Bitmask of supported extended descriptors, for example, if bit 7 is set then extended descriptor 7 is supported, and if bit 8 it set then extended descriptor 8 is supported

571  enum NtPacketDescriptorType_e descriptorType; //!< The descriptor type used

572  enum NtTimestampType_e timestampType; //!< The time stamp type used by the adapter

573  enum NtTimestampMethod_e timestampMethod; //!< The time stamp method (SOF/EOF) used by the adapter

574  enum NtTxTimingMethod_e txTiming; //!< The TX timing

575  struct NtInfoWis_v1_s wisMode; //!< Wis mode status

576  enum NtTimestampInjectOffsetMode_e tsInjectModeOffset; //!< Time stamp injection offset mode

577  struct NtInfoGlobalSync_s globalSync; //!< Global sync status

578  NtInfoBondingInfo_t bondingInfo; //!< Adapter Bonding status

579  enum NtFeatureLevel_e featureLevel; //!< Adapter/FPGA feature level

580 };

581 

582 /**

583  * NT_INFO_CMD_READ_ADAPTER_V6 specific data.

584  * The adapterNo must be initialized for the relevant adapter.

585  */

586 struct NtInfoCmdAdapter_v5_s {

587  uint8_t adapterNo; //!< The adapter to query

588  uint8_t Reserved1[3];

589  struct NtInfoAdapter_v5_s data; //!< The adapter data

590 };

591 

592 /***********************************************************************************************/

593 /* Adapter info version 6 */

594 /***********************************************************************************************/

595 #define NT_INFO_CMD_READ_ADAPTER_V6 NT_INFO_CMD_READ_COMPAT_27 //!< Adapter info - the number of sensors, ports, PCI ID and bus ID

596 

597 /**

598  * This structure will return the adapter specific info version 6.

599  * Must be a mirror of NtInfoAdapter_v5_s with version 6 variables added

600  * to the bottom.

601  */

602 struct NtInfoAdapter_v6_s {

603  uint8_t numSensors; //!< The number of sensors on this adapter

604  uint8_t Reserved1[3];

605  uint8_t numLevel1Sensors; //!< The number of level 1 sensors on this adapter

606  uint8_t Reserved2[3];

607  uint8_t portOffset; //!< The port numbers of this adapter start at this port offset

608  uint8_t Reserved3[3];

609  uint8_t numPorts; //!< The number of ports on this adapter

610  uint8_t Reserved4[3];

611  uint8_t numPhysicalAdapters; //!< The number of physical adapters grouped in this logical adapter

612  uint8_t Reserved5[3];

613  uint32_t numHostBuffersRx; //!< The number of RX host buffers on this adapter

614  uint32_t numHostBuffersTx; //!< The number of TX host buffers on this adapter

615  uint32_t numTsConnectors; //!< The number of time sync connectors on this adapter

616  enum NtAdapterType_e adapterType; //!< The adapter type

617  enum NtProductType_e productType; //!< The product line type

618  enum NtProfileType_e profile; //!< The profile the adapter is using

619  uint32_t supportedProfilesBitmask; //!< The profiles supported by the adapter - the value is represented as a bitmask of @ref NtProfileType_e values

620  uint32_t adapterFeatures; //!< The features supported by the adapter - the value is represented as a bitmask of @ref NtFeatureType_e values

621  enum NtProductFamily_e productFamily; //!< The product family

622  char name[128]; //!< The adapter name

623  char serialNo[50]; //!< The adapter serial number

624  /**

625  * AVR version for Gen2 adapters:

626  * avr[0] = Main board AVR,

627  * avr[1] = Front board AVR

628  */

629  struct NtversionAvr_s avr;

630 

631  /**

632  * The bus ID of the device

633  */

634  union Ntbusid_v6_u {

635  struct Ntbusid_v6_s {

636  uint32_t function:3; //!< The PCI function number

637  uint32_t device:5; //!< The PCI device number

638  uint32_t bus:8; //!< The PCI bus number

639  uint32_t domain:16; //!< The PCI domain number

640  }s;

641  uint32_t value; //!< The domain, bus, device and function as a 32-bit value

642  } busid;

643  /**

644  * PCI ID is read as:

645  * 32-bit value,

646  * 2 x 16-bit values defining

647  * device ID and

648  * vendor ID

649  */

650  union Ntpciid_u pciid;

651  struct NtInfoPCIeInfo_s pciInfo; //!< Information about the PCI bus.

652  /**

653  * The FPGA ID of the image currently running on the adapter.

654  * The format is: item-product-version-revision-build.

655  * For example, 200-9114-40-01-1023.

656  */

657  union Ntfpgaid_u fpgaid;

658  struct NtInfoSDRAMInfo_s sdramInfo; //!< The SDRAM information

659  uint32_t extendedDescriptor; //!< The extended descriptor in use by RX - if 0 then no extended is used

660  uint32_t supportedExtendedDescriptorsBitmask; //!< Bitmask of supported extended descriptors, for example, if bit 7 is set then extended descriptor 7 is supported, and if bit 8 it set then extended descriptor 8 is supported

661  enum NtPacketDescriptorType_e descriptorType; //!< The descriptor type used

662  enum NtTimestampType_e timestampType; //!< The time stamp type used by the adapter

663  enum NtTimestampMethod_e timestampMethod; //!< The time stamp method (SOF/EOF) used by the adapter

664  enum NtTxTimingMethod_e txTiming; //!< The TX timing

665  struct NtInfoWis_v1_s wisMode; //!< Wis mode status

666  enum NtTimestampInjectOffsetMode_e tsInjectModeOffset; //!< Time stamp injection offset mode

667  struct NtInfoGlobalSync_s globalSync; //!< Global sync status

668  NtInfoBondingInfo_t bondingInfo; //!< Adapter Bonding status

669  enum NtFeatureLevel_e featureLevel; //!< Adapter/FPGA feature level

670  uint16_t customId; //!< Custom identification number

671 };

672 

673 /**

674  * NT_INFO_CMD_READ_ADAPTER_V6 specific data.

675  * The adapterNo must be initialized for the relevant adapter.

676  */

677 struct NtInfoCmdAdapter_v6_s {

678  uint8_t adapterNo; //!< The adapter to query

679  uint8_t Reserved1[3];

680  struct NtInfoAdapter_v6_s data; //!< The adapter data

681 };

682 

683 /***********************************************************************************************/

684 /* Port info version 0 */

685 /***********************************************************************************************/

686 #define NT_INFO_CMD_READ_PORT NT_INFO_CMD_READ_COMPAT_1 //!< Port info - the port state, speed and duplex

687 /**

688  * This structure will return the port specific information

689  */

690 typedef struct NtInfoPort_s {

691  enum NtPortType_e type; //!< The interface type

692  enum NtLinkState_e state; //!< The port up or down

693  enum NtLinkSpeed_e speed; //!< The interface speed

694  enum NtLinkDuplex_e duplex; //!< The duplex mode

695  int32_t flow; //!< 0 = No flow control, 1 = Flow control

696  enum NtLinkMDI_e mdi; //!< 0 = auto, 1 = MDI, 2 = MDIX

697  uint8_t macAddress[6]; //!< The MAC address of the interface

698  uint16_t maxFrameSize; //!< The current maximum frame size

699  /**

700  * Capabilities reflect what the port is capable of, that is what speed/duplex is possible. For example,

701  * if only 100 M full duplex is available, the capabilities would

702  * show:

703  * halfDuplexMask=0.

704  * fullDuplexMask=NT_LINK_SPEED_100M.

705  * Other capabilities are min/max transmit sizes.

706  */

707  struct NtLinkCapabilities_s capabilities; //!< The link capabilities

708  uint8_t adapterNo; //!< The adapter that has the port

709  uint8_t Reserved1[3];

710  uint8_t numSensors; //!< The number of sensors on this port

711  uint8_t Reserved2[3];

712  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port

713  uint8_t Reserved3[3];

714  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port

715  uint8_t Reserved4[3];

716 

717  /**

718  * NIM model information

719  */

720  enum NtNimIdentifier_e nim_id; //!< NIM identifier

721  uint8_t vendor_name[17]; //!< NIM Vendor name

722  uint8_t product_no[17]; //!< NIM product number

723  uint8_t serial_no[17]; //!< NIM serial number

724  uint8_t date[9]; //!< NIM vendors manufacturing date

725  uint8_t revision[5]; //!< NIM vendor revision

726  uint8_t power_level_req; //!< NIM required power level

727  uint8_t power_level_curr; //!< NIM current power level

728  struct NtNIMLinkLength_s link_length;

729 } NtInfoPort_t;

730 

731 /**

732  * NT_INFO_CMD_READ_PORT specific data.

733  * The portNo must be initialized for the relevant port.

734  */

735 struct NtInfoCmdPort_s {

736  uint8_t portNo; //!< The port to query

737  uint8_t Reserved1[3];

738  struct NtInfoPort_s data; //!< The port data

739 };

740 /***********************************************************************************************/

741 /* Port info version 1 */

742 /***********************************************************************************************/

743 #define NT_INFO_CMD_READ_PORT_V1 NT_INFO_CMD_READ_COMPAT_6 //!< Port info - the port state, speed and duplex

744 /**

745  * This structure will return the port specific information version 1.

746  * Must be a mirror of NtInfoPort_s with version 1 variables added

747  * to the bottom.

748  */

749 struct NtInfoPort_v1_s {

750  enum NtPortType_e type; //!< The interface type

751  enum NtLinkState_e state; //!< The port up or down

752  enum NtLinkSpeed_e speed; //!< The interface speed

753  enum NtLinkDuplex_e duplex; //!< The duplex mode

754  int32_t flow; //!< 0 = no flow control, 1 = flow control

755  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX

756  uint8_t macAddress[6]; //!< The MAC address of the interface

757  uint16_t maxFrameSize; //!< The current maximum frame size

758  /**

759  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,

760  * if only 100 M full duplex is available, the capabilities would

761  * show:

762  * halfDuplexMask=0.

763  * fullDuplexMask=NT_LINK_SPEED_100M.

764  * Other capabilities are min/max transmit sizes.

765  */

766  struct NtLinkCapabilities_s capabilities; //!< The link capabilities

767  uint8_t adapterNo; //!< The adapter that has the port

768  uint8_t Reserved1[3];

769  uint8_t numSensors; //!< The number of sensors on this port

770  uint8_t Reserved2[3];

771  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port

772  uint8_t Reserved3[3];

773  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port

774  uint8_t Reserved4[3];

775 

776  /**

777  * NIM model information

778  */

779  enum NtNimIdentifier_e nim_id; //!< NIM identifier

780  uint8_t vendor_name[17]; //!< NIM Vendor name

781  uint8_t product_no[17]; //!< NIM product number

782  uint8_t serial_no[17]; //!< NIM serial number

783  uint8_t date[9]; //!< NIM vendors manufacturing date

784  uint8_t revision[5]; //!< NIM vendor revision

785  uint8_t power_level_req; //!< NIM required power level

786  uint8_t power_level_curr; //!< NIM current power level

787  struct NtNIMLinkLength_s link_length;

788 

789  /**

790  * Adapter information

791  */

792  struct NtInfoAdapter_v1_s adapterInfo; // Adapter information

793  /**

794  * Bypass port information

795  */

796  struct NtBypassPortInfo_s bypass; // Bypass port information

797 };

798 

799 /**

800  * NT_INFO_CMD_READ_PORT_V1 specific data.

801  * The portNo must be initialized for the relevant port.

802  */

803 struct NtInfoCmdPort_v1_s {

804  uint8_t portNo; //!< The port to query

805  uint8_t Reserved1[3];

806  struct NtInfoPort_v1_s data; //!< The port data

807 };

808 

809 

810 /***********************************************************************************************/

811 /* Port info version 2 */

812 /***********************************************************************************************/

813 #define NT_INFO_CMD_READ_PORT_V2 NT_INFO_CMD_READ_COMPAT_8 //!< Port info - the port state, speed and duplex

814 /**

815  * This structure will return the port specific information version 2.

816  * Must be a mirror of NtInfoPort_v1_s with version 2 variables added

817  * to the bottom.

818  */

819 struct NtInfoPort_v2_s {

820  enum NtPortType_e type; //!< The interface type

821  enum NtLinkState_e state; //!< The port up or down

822  enum NtLinkSpeed_e speed; //!< The interface speed

823  enum NtLinkDuplex_e duplex; //!< The duplex mode

824  int32_t flow; //!< 0 = no flow control, 1 = flow control

825  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX

826  uint8_t macAddress[6]; //!< The MAC address of the interface

827  uint16_t maxFrameSize; //!< The current maximum frame size

828  /**

829  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,

830  * if only 100 M full duplex is available, the capabilities would

831  * show:

832  * halfDuplexMask=0.

833  * fullDuplexMask=NT_LINK_SPEED_100M.

834  * Other capabilities are min/max transmit sizes.

835  */

836  struct NtLinkCapabilities_s capabilities; //!< The link capabilities

837  uint8_t adapterNo; //!< The adapter that has the port

838  uint8_t Reserved1[3];

839  uint8_t numSensors; //!< The number of sensors on this port

840  uint8_t Reserved2[3];

841  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port

842  uint8_t Reserved3[3];

843  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port

844  uint8_t Reserved4[3];

845 

846  /**

847  * NIM model information

848  */

849  enum NtNimIdentifier_e nim_id; //!< NIM identifier

850  uint8_t vendor_name[17]; //!< NIM Vendor name

851  uint8_t product_no[17]; //!< NIM product number

852  uint8_t serial_no[17]; //!< NIM serial number

853  uint8_t date[9]; //!< NIM vendors manufacturing date

854  uint8_t revision[5]; //!< NIM vendor revision

855  uint8_t power_level_req; //!< NIM required power level

856  uint8_t power_level_curr; //!< NIM current power level

857  struct NtNIMLinkLength_s link_length;

858 

859  /**

860  * Adapter information

861  */

862  struct NtInfoAdapter_v2_s adapterInfo; // Adapter information

863  /**

864  * Bypass port information

865  */

866  struct NtBypassPortInfo_s bypass; // Bypass port information

867 };

868 

869 /**

870  * NT_INFO_CMD_READ_PORT_V2 specific data.

871  * The portNo must be initialized for the relevant port.

872  */

873 struct NtInfoCmdPort_v2_s {

874  uint8_t portNo; //!< The port to query

875  uint8_t Reserved1[3];

876  struct NtInfoPort_v2_s data; //!< The port data

877 };

878 

879 /***********************************************************************************************/

880 /* Port info version 3 */

881 /***********************************************************************************************/

882 #define NT_INFO_CMD_READ_PORT_V3 NT_INFO_CMD_READ_COMPAT_12 //!< Port info - the port state, speed and duplex

883 

884 

885 /**

886  * This structure will return the port specific information version 3.

887  * Must be a mirror of NtInfoPort_v2_s with version 3 variables added

888  * to the bottom.

889  */

890 struct NtInfoPort_v3_s {

891  enum NtPortType_e type; //!< The interface type

892  enum NtLinkState_e state; //!< The port up or down

893  enum NtLinkSpeed_e speed; //!< The interface speed

894  enum NtLinkDuplex_e duplex; //!< The duplex mode

895  int32_t flow; //!< 0 = no flow control, 1 = flow control

896  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX

897  uint8_t macAddress[6]; //!< The MAC address of the interface

898  uint16_t maxFrameSize; //!< The current maximum frame size

899  /**

900  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,

901  * if only 100 M full duplex is available, the capabilities would

902  * show:

903  * halfDuplexMask=0.

904  * fullDuplexMask=NT_LINK_SPEED_100M.

905  * Other capabilities are min/max transmit sizes.

906  */

907  struct NtLinkCapabilities_s capabilities; //!< The link capabilities

908  uint8_t adapterNo; //!< The adapter that has the port

909  uint8_t Reserved1[3];

910  uint8_t numSensors; //!< The number of sensors on this port

911  uint8_t Reserved2[3];

912  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port

913  uint8_t Reserved3[3];

914  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port

915  uint8_t Reserved4[3];

916 

917  /**

918  * NIM model information

919  */

920  enum NtNimIdentifier_e nim_id; //!< NIM identifier

921  uint8_t vendor_name[17]; //!< NIM Vendor name

922  uint8_t product_no[17]; //!< NIM product number

923  uint8_t serial_no[17]; //!< NIM serial number

924  uint8_t date[9]; //!< NIM vendors manufacturing date

925  uint8_t revision[5]; //!< NIM vendor revision

926  uint8_t power_level_req; //!< NIM required power level

927  uint8_t power_level_curr; //!< NIM current power level

928  struct NtNIMLinkLength_s link_length;

929 

930  /**

931  * Adapter information

932  */

933  struct NtInfoAdapter_v3_s adapterInfo; // Adapter information

934  /**

935  * Bypass port information

936  */

937  struct NtBypassPortInfo_s bypass; // Bypass port information

938 };

939 

940 /**

941  * NT_INFO_CMD_READ_PORT_V3 specific data.

942  * The portNo must be initialized for the relevant port.

943  */

944 struct NtInfoCmdPort_v3_s {

945  uint8_t portNo; //!< The port to query

946  uint8_t Reserved1[3];

947  struct NtInfoPort_v3_s data; //!< The port data

948 };

949 

950 

951 /***********************************************************************************************/

952 /* Port info version 4 */

953 /***********************************************************************************************/

954 #define NT_INFO_CMD_READ_PORT_V4 NT_INFO_CMD_READ_COMPAT_14 //!< Port info - the port state, speed and duplex

955 

956 

957 /**

958  * This structure will return the port specific information version 3.

959  * Must be a mirror of NtInfoPort_v3_s with version 4 variables added

960  * to the bottom.

961  */

962 struct NtInfoPort_v4_s {

963  enum NtPortType_e type; //!< The interface type

964  enum NtLinkState_e state; //!< The port up or down

965  enum NtLinkSpeed_e speed; //!< The interface speed

966  enum NtLinkDuplex_e duplex; //!< The duplex mode

967  int32_t flow; //!< 0 = no flow control, 1 = flow control

968  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX

969  uint8_t macAddress[6]; //!< The MAC address of the interface

970  uint16_t maxFrameSize; //!< The current maximum frame size

971  /**

972  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,

973  * if only 100 M full duplex is available, the capabilities would

974  * show:

975  * halfDuplexMask=0.

976  * fullDuplexMask=NT_LINK_SPEED_100M.

977  * Other capabilities are min/max transmit sizes.

978  */

979  struct NtLinkCapabilities_s capabilities; //!< The link capabilities

980  uint8_t adapterNo; //!< The adapter that has the port

981  uint8_t Reserved1[3];

982  uint8_t numSensors; //!< The number of sensors on this port

983  uint8_t Reserved2[3];

984  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port

985  uint8_t Reserved3[3];

986  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port

987  uint8_t Reserved4[3];

988 

989  /**

990  * NIM model information

991  */

992  enum NtNimIdentifier_e nim_id; //!< NIM identifier

993  uint8_t vendor_name[17]; //!< NIM Vendor name

994  uint8_t product_no[17]; //!< NIM product number

995  uint8_t serial_no[17]; //!< NIM serial number

996  uint8_t date[9]; //!< NIM vendors manufacturing date

997  uint8_t revision[5]; //!< NIM vendor revision

998  uint8_t power_level_req; //!< NIM required power level

999  uint8_t power_level_curr; //!< NIM current power level

1000  struct NtNIMLinkLength_s link_length;

1001 

1002  /**

1003  * Adapter information

1004  */

1005  struct NtInfoAdapter_v4_s adapterInfo; // Adapter information

1006  /**

1007  * Bypass port information

1008  */

1009  struct NtBypassPortInfo_s bypass; // Bypass port information

1010 };

1011 

1012 

1013 /**

1014  * NT_INFO_CMD_READ_PORT_V4 specific data.

1015  * The portNo must be initialized for the relevant port.

1016  */

1017 struct NtInfoCmdPort_v4_s {

1018  uint8_t portNo; //!< The port to query

1019  uint8_t Reserved1[3];

1020  struct NtInfoPort_v4_s data; //!< The port data

1021 };

1022 

1023 

1024 /***********************************************************************************************/

1025 /* Port info version 5 */

1026 /***********************************************************************************************/

1027 #define NT_INFO_CMD_READ_PORT_V5 NT_INFO_CMD_READ_COMPAT_16 //!< Port info - the port state, speed and duplex

1028 

1029 /**

1030  * This structure will return the port specific information version 5.

1031  * Must be a mirror of NtInfoPort_v4_s with version 5 variables added

1032  * to the bottom.

1033  */

1034 struct NtInfoPort_v5_s {

1035  enum NtPortType_e type; //!< The interface type

1036  enum NtLinkState_e state; //!< The port up or down

1037  enum NtLinkSpeed_e speed; //!< The interface speed

1038  enum NtLinkDuplex_e duplex; //!< The duplex mode

1039  int32_t flow; //!< 0 = no flow control, 1 = flow control

1040  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX

1041  uint8_t macAddress[6]; //!< The MAC address of the interface

1042  uint16_t maxFrameSize; //!< The current maximum frame size

1043  /**

1044  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,

1045  * if only 100 M full duplex is available, the capabilities would

1046  * show:

1047  * halfDuplexMask=0.

1048  * fullDuplexMask=NT_LINK_SPEED_100M.

1049  * Other capabilities are min/max transmit sizes.

1050  */

1051  struct NtLinkCapabilities_s capabilities; //!< The link capabilities

1052  uint8_t adapterNo; //!< The adapter that has the port

1053  uint8_t Reserved1[3];

1054  uint8_t numSensors; //!< The number of sensors on this port

1055  uint8_t Reserved2[3];

1056  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port

1057  uint8_t Reserved3[3];

1058  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port

1059  uint8_t Reserved4[3];

1060 

1061  /**

1062  * NIM model information

1063  */

1064  enum NtNimIdentifier_e nim_id; //!< NIM identifier

1065  uint8_t vendor_name[17]; //!< NIM Vendor name

1066  uint8_t product_no[17]; //!< NIM product number

1067  uint8_t serial_no[17]; //!< NIM serial number

1068  uint8_t date[9]; //!< NIM vendors manufacturing date

1069  uint8_t revision[5]; //!< NIM vendor revision

1070  uint8_t power_level_req; //!< NIM required power level

1071  uint8_t power_level_curr; //!< NIM current power level

1072  struct NtNIMLinkLength_s link_length;

1073 

1074  /**

1075  * Adapter information

1076  */

1077  struct NtInfoAdapter_v5_s adapterInfo; // Adapter information

1078  /**

1079  * Bypass port information

1080  */

1081  struct NtBypassPortInfo_s bypass; // Bypass port information

1082 };

1083 

1084 

1085 /**

1086  * NT_INFO_CMD_READ_PORT_V5 specific data.

1087  * The portNo must be initialized for the relevant port.

1088  */

1089 struct NtInfoCmdPort_v5_s {

1090  uint8_t portNo; //!< The port to query

1091  uint8_t Reserved1[3];

1092  struct NtInfoPort_v5_s data; //!< The port data

1093 };

1094 

1095 

1096 /***********************************************************************************************/

1097 /* Port info version 6 */

1098 /***********************************************************************************************/

1099 #define NT_INFO_CMD_READ_PORT_V6 NT_INFO_CMD_READ_COMPAT_18 //!< Port info - the port state, speed and duplex

1100 

1101 /**

1102  * This structure will return the port specific information version 6.

1103  * Must be a mirror of NtInfoPort_v5_s with version 6 variables added

1104  * to the bottom.

1105  */

1106 struct NtInfoPort_v6_s {

1107  enum NtPortType_e type; //!< The interface type

1108  enum NtLinkState_e state; //!< The port up or down

1109  enum NtLinkSpeed_e speed; //!< The interface speed

1110  enum NtLinkDuplex_e duplex; //!< The duplex mode

1111  int32_t flow; //!< 0 = no flow control, 1 = flow control

1112  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX

1113  uint8_t macAddress[6]; //!< The MAC address of the interface

1114  uint16_t maxFrameSize; //!< The current maximum frame size

1115  /**

1116  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,

1117  * if only 100 M full duplex is available, the capabilities would

1118  * show:

1119  * halfDuplexMask=0.

1120  * fullDuplexMask=NT_LINK_SPEED_100M.

1121  * Other capabilities are min/max transmit sizes.

1122  */

1123  struct NtLinkCapabilities_s capabilities; //!< The link capabilities

1124  uint8_t adapterNo; //!< The adapter that has the port

1125  uint8_t Reserved1[3];

1126  uint8_t numSensors; //!< The number of sensors on this port

1127  uint8_t Reserved2[3];

1128  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port

1129  uint8_t Reserved3[3];

1130  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port

1131  uint8_t Reserved4[3];

1132 

1133  /**

1134  * NIM model information

1135  */

1136  enum NtNimIdentifier_e nim_id; //!< NIM identifier

1137  uint8_t vendor_name[17]; //!< NIM Vendor name

1138  uint8_t product_no[17]; //!< NIM product number

1139  uint8_t serial_no[17]; //!< NIM serial number

1140  uint8_t date[9]; //!< NIM vendors manufacturing date

1141  uint8_t revision[5]; //!< NIM vendor revision

1142  uint8_t power_level_req; //!< NIM required power level

1143  uint8_t power_level_curr; //!< NIM current power level

1144  struct NtNIMLinkLength_s link_length;

1145 

1146  /**

1147  * Adapter information

1148  */

1149  struct NtInfoAdapter_v5_s adapterInfo; // Adapter information

1150  /**

1151  * Bypass port information

1152  */

1153  struct NtBypassPortInfo_s bypass; // Bypass port information

1154  uint32_t statusMask; //!< Adapter status mask holds information on how the port is configured at startup

1155 };

1156 

1157 /**

1158  * NT_INFO_CMD_READ_PORT_V6 specific data.

1159  * The portNo must be initialized for the relevant port.

1160  */

1161 struct NtInfoCmdPort_v6_s {

1162  uint8_t portNo; //!< The port to query

1163  uint8_t Reserved1[3];

1164  struct NtInfoPort_v6_s data; //!< The port data

1165 };

1166 

1167 /***********************************************************************************************/

1168 /* Port info version 7 */

1169 /***********************************************************************************************/

1170 #define NT_INFO_CMD_READ_PORT_V7 NT_INFO_CMD_READ_COMPAT_20 //!< Port info - the port state, speed and duplex

1171 

1172 /**

1173  * This structure will return the port specific information version 7.

1174  * Must be a mirror of NtInfoPort_v6_s with version 7 variables added

1175  * to the bottom.

1176  */

1177 struct NtInfoPort_v7_s {

1178  enum NtPortType_e type; //!< The interface type

1179  enum NtLinkState_e state; //!< The port up or down

1180  enum NtLinkSpeed_e speed; //!< The interface speed

1181  enum NtLinkDuplex_e duplex; //!< The duplex mode

1182  int32_t flow; //!< 0 = no flow control, 1 = flow control

1183  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX

1184  uint8_t macAddress[6]; //!< The MAC address of the interface

1185  uint16_t maxFrameSize; //!< The current maximum frame size

1186  /**

1187  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,

1188  * if only 100 M full duplex is available, the capabilities would

1189  * show:

1190  * halfDuplexMask=0.

1191  * fullDuplexMask=NT_LINK_SPEED_100M.

1192  * Other capabilities are min/max transmit sizes.

1193  */

1194  struct NtLinkCapabilities_s capabilities; //!< The link capabilities

1195  uint8_t adapterNo; //!< The adapter that has the port

1196  uint8_t Reserved1[3];

1197  uint8_t numSensors; //!< The number of sensors on this port

1198  uint8_t Reserved2[3];

1199  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port

1200  uint8_t Reserved3[3];

1201  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port

1202  uint8_t Reserved4[3];

1203 

1204  /**

1205  * NIM model information

1206  */

1207  enum NtNimIdentifier_e nim_id; //!< NIM identifier

1208  uint8_t vendor_name[17]; //!< NIM Vendor name

1209  uint8_t product_no[17]; //!< NIM product number

1210  uint8_t serial_no[17]; //!< NIM serial number

1211  uint8_t date[9]; //!< NIM vendors manufacturing date

1212  uint8_t revision[5]; //!< NIM vendor revision

1213  uint8_t power_level_req; //!< NIM required power level

1214  uint8_t power_level_curr; //!< NIM current power level

1215  struct NtNIMLinkLength_s link_length;

1216 

1217  /**

1218  * Adapter information

1219  */

1220  struct NtInfoAdapter_v6_s adapterInfo; // Adapter information

1221  /**

1222  * Bypass port information

1223  */

1224  struct NtBypassPortInfo_s bypass; // Bypass port information

1225  uint32_t statusMask; //!< Adapter status mask holds information on how the port is configured at startup

1226 };

1227 

1228 

1229 /***********************************************************************************************/

1230 /* Port info version 8 */

1231 /***********************************************************************************************/

1232 #define NT_INFO_CMD_READ_PORT_V8 NT_INFO_CMD_READ_COMPAT_24 //!< Port info - the port state, speed and duplex

1233 /**

1234  * This structure will return the port specific information version 8.

1235  * Must be a mirror of NtInfoPort_v7_s with version 8 variables added

1236  * to the bottom.

1237  */

1238 struct NtInfoPort_v8_s {

1239  enum NtPortType_e type; //!< The interface type

1240  enum NtLinkState_e state; //!< The port up or down

1241  enum NtLinkSpeed_e speed; //!< The interface speed

1242  enum NtLinkDuplex_e duplex; //!< The duplex mode

1243  int32_t flow; //!< 0 = no flow control, 1 = flow control

1244  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX

1245  uint8_t macAddress[6]; //!< The MAC address of the interface

1246  uint16_t maxFrameSize; //!< The current maximum frame size

1247  /**

1248  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,

1249  * if only 100 M full duplex is available, the capabilities would

1250  * show:

1251  * halfDuplexMask=0.

1252  * fullDuplexMask=NT_LINK_SPEED_100M.

1253  * Other capabilities are min/max transmit sizes.

1254  */

1255  struct NtLinkCapabilities_s capabilities; //!< The link capabilities

1256  uint8_t adapterNo; //!< The adapter that has the port

1257  uint8_t Reserved1[3];

1258  uint8_t numSensors; //!< The number of sensors on this port

1259  uint8_t Reserved2[3];

1260  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port

1261  uint8_t Reserved3[3];

1262  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port

1263  uint8_t Reserved4[3];

1264 

1265  /**

1266  * NIM model information

1267  */

1268  enum NtNimIdentifier_e nim_id; //!< NIM identifier

1269  uint8_t vendor_name[17]; //!< NIM Vendor name

1270  uint8_t product_no[17]; //!< NIM product number

1271  uint8_t serial_no[17]; //!< NIM serial number

1272  uint8_t date[9]; //!< NIM vendors manufacturing date

1273  uint8_t revision[5]; //!< NIM vendor revision

1274  uint8_t power_level_req; //!< NIM required power level

1275  uint8_t power_level_curr; //!< NIM current power level

1276  struct NtNIMLinkLength_s link_length;

1277  /**

1278  * Adapter information

1279  */

1280  struct NtInfoAdapter_v6_s adapterInfo; // Adapter information

1281  /**

1282  * Bypass port information

1283  */

1284  struct NtBypassPortInfo_s bypass; // Bypass port information

1285  uint32_t statusMask; //!< Adapter status mask holds information on how the port is configured at startup

1286  NtPortFec_t fecState; //!< The state of Forward Error Correction if applicable

1287 };

1288 

1289 /***********************************************************************************************/

1290 /* Port info version 8 */

1291 /***********************************************************************************************/

1292 #define NT_INFO_CMD_READ_PORT_V9 NT_INFO_CMD_READ_COMPAT_28 //!< Port info - the port state, speed and duplex

1293 

1294 /**

1295  * This structure will return the port specific information version 7.

1296  * Must be a mirror of NtInfoPort_v8_s with version 9 variables added

1297  * to the bottom.

1298  */

1299 struct NtInfoPort_v9_s {

1300  enum NtPortType_e type; //!< The interface type

1301  enum NtLinkState_e state; //!< The port up or down

1302  enum NtLinkSpeed_e speed; //!< The interface speed

1303  enum NtLinkDuplex_e duplex; //!< The duplex mode

1304  int32_t flow; //!< 0 = no flow control, 1 = flow control

1305  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX

1306  uint8_t macAddress[6]; //!< The MAC address of the interface

1307  uint16_t maxFrameSize; //!< The current maximum frame size

1308  /**

1309  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,

1310  * if only 100 M full duplex is available, the capabilities would

1311  * show:

1312  * halfDuplexMask=0.

1313  * fullDuplexMask=NT_LINK_SPEED_100M.

1314  * Other capabilities are min/max transmit sizes.

1315  */

1316  struct NtLinkCapabilities_s capabilities; //!< The link capabilities

1317  uint8_t adapterNo; //!< The adapter that has the port

1318  uint8_t Reserved1[3];

1319  uint8_t numSensors; //!< The number of sensors on this port

1320  uint8_t Reserved2[3];

1321  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port

1322  uint8_t Reserved3[3];

1323  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port

1324  uint8_t Reserved4[3];

1325 

1326  /**

1327  * NIM model information

1328  */

1329  enum NtNimIdentifier_e nim_id; //!< NIM identifier

1330  uint8_t vendor_name[17]; //!< NIM Vendor name

1331  uint8_t product_no[17]; //!< NIM product number

1332  uint8_t serial_no[17]; //!< NIM serial number

1333  uint8_t date[9]; //!< NIM vendors manufacturing date

1334  uint8_t revision[5]; //!< NIM vendor revision

1335  uint8_t power_level_req; //!< NIM required power level

1336  uint8_t power_level_curr; //!< NIM current power level

1337  struct NtNIMLinkLength_s link_length;

1338  /**

1339  * Adapter information

1340  */

1341  struct NtInfoAdapter_v6_s adapterInfo; // Adapter information

1342  /**

1343  * Bypass port information

1344  */

1345  struct NtBypassPortInfo_s bypass; // Bypass port information

1346  uint32_t statusMask; //!< The status mask is either zero or one dependent on

1347  //!< the ntservice.ini setting IfgMode (NS or BYTE): Zero

1348  //!< denotes inter-frame gaps are in 10-ns ticks (NS),

1349  //!< and one denotes bytes (BYTE)

1350  NtPortFec_t fecState; //!< The state of Forward Error Correction if applicable

1351  uint64_t nextPktNs; //!< Time till next packet will be transmitted in ns

1352  uint64_t maxPktDelayedNs; //!< Max time pkts were late in being transmitted

1353 };

1354 

1355 

1356 

1357 

1358 /**

1359  * NT_INFO_CMD_READ_PORT_V7 specific data.

1360  * The portNo must be initialized for the relevant port.

1361  */

1362 struct NtInfoCmdPort_v7_s {

1363  uint8_t portNo; //!< The port to query

1364  uint8_t Reserved1[3];

1365  struct NtInfoPort_v7_s data; //!< The port data

1366 };

1367 

1368 /**

1369  * NT_INFO_CMD_READ_PORT_V8 specific data.

1370  * The portNo must be initialized for the relevant port.

1371  */

1372 struct NtInfoCmdPort_v8_s {

1373  uint8_t portNo; //!< The port to query

1374  uint8_t Reserved1[3];

1375  struct NtInfoPort_v8_s data; //!< The port data

1376 };

1377 

1378 /**

1379  * NT_INFO_CMD_READ_PORT_V9 specific data.

1380  * The portNo must be initialized for the relevant port.

1381  */

1382 struct NtInfoCmdPort_v9_s {

1383  uint8_t portNo; //!< The port to query

1384  uint8_t Reserved1[3];

1385  struct NtInfoPort_v9_s data; //!< The port data

1386 };

1387 

1388 

1389 /***********************************************************************************************/

1390 /* Time sync version 0 */

1391 /***********************************************************************************************/

1392 #define NT_INFO_CMD_READ_TIMESYNC NT_INFO_CMD_READ_COMPAT_2 //!< Time sync info - the time sync connector and time sync data

1393 

1394 struct NtInfoTimeSync_s {

1395  uint32_t timeSyncSupported; //!< Is the time sync supported by this adapter

1396  uint32_t timeSyncProtocol; //!< The time sync protocol

1397  uint32_t timeSyncPpsEnable; //!< The time sync PPS enable

1398  uint32_t timeSyncConnectorIn; //!< The time sync input connector

1399  uint32_t timeSyncConnectorOut; //!< The time sync output connectors

1400  uint32_t timeSyncConnectorRepeat; //!< The time sync repeater connectors

1401  uint32_t timeSyncTimeJumpThreshold; //!< The time sync time jump threshold in seconds

1402  uint32_t timeSyncTimeOffset; //!< The time sync offset in nanoseconds

1403  uint64_t timeSyncPpsSampled; //!< The sampled PPS time (0 if not applicable)

1404  int64_t timeSyncTimeSkew; //!< The time skew

1405  uint32_t timeSyncStatus; //!< The time sync status

1406 };

1407 

1408 /**

1409  * NT_INFO_CMD_READ_TIMESYNC specific data.

1410  * The adapterNo must be initialized for the relevant adapter.

1411  */

1412 struct NtInfoCmdTimeSync_s {

1413  uint8_t adapterNo; //!< The adapter to query

1414  uint8_t Reserved1[3];

1415  struct NtInfoTimeSync_s data; //!< The time sync data

1416 };

1417 

1418 #define NT_INFO_CMD_READ_TIMESYNC_V1 NT_INFO_CMD_READ_COMPAT_4 //!< Time sync info - the time sync connector and time sync data

1419 

1420 /**

1421  * Time sync status

1422  */

1423 enum NtTimeSyncStatus_e {

1424  NT_TIMESYNC_STATUS_NONE = 0, //!< Time sync status unused

1425  NT_TIMESYNC_STATUS_SIGNAL_LOST, //!< Time sync signal lost (NT and PPS)

1426  NT_TIMESYNC_STATUS_SIGNAL_PRESENT, //!< Time sync signal present (NT and PPS)

1427  NT_TIMESYNC_STATUS_OS_SYNCING, //!< OS time sync synching (OS only)

1428  NT_TIMESYNC_STATUS_OS_IN_SYNC, //!< OS time sync in synchronization (OS only)

1429 };

1430 

1431 /**

1432  * Time sync OS Failover status

1433  */

1434 enum NtTimeSyncOSFailoverStatus_e {

1435  NT_TIMESYNC_OS_FAILOVER_STATUS_DISABLED = 0,

1436  NT_TIMESYNC_OS_FAILOVER_STATUS_INIT = 1,

1437  NT_TIMESYNC_OS_FAILOVER_STATUS_WAITING = 2,

1438  NT_TIMESYNC_OS_FAILOVER_STATUS_ACTIVE = 3,

1439 };

1440 

1441 /**

1442  * Time sync specific info V1

1443  */

1444 struct NtInfoTimeSync_v1_s {

1445  uint32_t timeSyncSupported; //!< Is the time sync supported by this adapter

1446  enum NtTimeSyncProtocol_e timeSyncProtocol; //!< The time sync protocol

1447  enum NtTimeSyncPpsStatus_e timeSyncPpsEnable; //!< The time sync PPS enable

1448  uint32_t timeSyncConnectorIn; //!< The time sync input connector

1449  uint32_t timeSyncConnectorOut; //!< The time sync output connectors

1450  uint32_t timeSyncConnectorRepeat; //!< The time sync repeater connectors

1451  uint32_t timeSyncTimeJumpThreshold; //!< The time sync time jump threshold in seconds

1452  uint32_t timeSyncTimeOffset; //!< The time sync offset in nanoseconds

1453  uint64_t timeSyncPpsSampled; //!< The sampled PPS time (0 if not applicable)

1454  int64_t timeSyncTimeSkew; //!< The time skew

1455  enum NtTimeSyncStatus_e timeSyncStatus; //!< The time sync status

1456  uint32_t osTimeSyncFailoverEnable; //!< The OS time sync failover enable

1457  uint32_t osTimeSyncFailoverStatus; //!< The OS time sync failover status

1458  uint32_t highFrequencySampling; //!< The high frequency sampling status

1459  uint64_t adapterTime; //!< The sampled adapter time

1460  uint64_t externalTime; //!< The sampled external time

1461  uint32_t timeSyncConnectorPpsOut; //!< The time sync PPS out connector

1462 };

1463 /**

1464  * NT_INFO_CMD_READ_TIMESYNC_V1 specific data.

1465  * The adapterNo must be initialized for the relevant adapter.

1466  */

1467 struct NtInfoCmdTimeSync_v1_s {

1468  uint8_t adapterNo; //!< The adapter to query

1469  uint8_t Reserved1[3];

1470  struct NtInfoTimeSync_v1_s data; //!< The time sync data

1471 };

1472 

1473 

1474 #define NT_INFO_CMD_READ_TIMESYNC_V2 NT_INFO_CMD_READ_COMPAT_10

1475 

1476 /**

1477  * Time syncronization specific info

1478  */

1479 struct NtInfoTimeSync_v2_s {

1480  uint32_t timeSyncSupported; //!< Is time sync supported by this adapter

1481  uint32_t ptpSupported; //!< Is PTP time sync available on this adapter

1482 

1483  NtTimeSyncConnectorSetting_t timeSyncConnectorExt1; //!< Timesync connector Ext1 setting

1484  NtTimeSyncConnectorSetting_t timeSyncConnectorInt1; //!< Timesync connector Int1 setting

1485  NtTimeSyncConnectorSetting_t timeSyncConnectorInt2; //!< Timesync connector Int2 setting

1486  enum NtTimeSyncReference_e tsRefPrio[4]; //!< Timesync source reference priority list

1487  enum NtTimeSyncReference_e timeRef; //!< The current time reference

1488  enum NtTimeSyncFreqReference_e tsFreqRefPrio[4]; //!< Timesync frequency reference priority list

1489  enum NtTimeSyncFreqReference_e freqRef; //!< The current frequency reference

1490  uint32_t timeSyncNTTSInSyncLimit; //!< The configured NT-TS in-sync limit

1491  uint32_t timeSyncOSInSyncLimit; //!< The configured OS in-sync limit

1492  uint32_t timeSyncPPSInSyncLimit; //!< The configured PPS in-sync limit

1493  uint32_t timeSyncPTPInSyncLimit; //!< The configured PTP in-sync limit

1494  enum NtTimeSyncInSyncStatus_e timeSyncInSyncStatus; //!< The timestamp clock time in-sync/out-of-sync status

1495  enum NtTimeSyncConStatus_e timeSyncCurrentConStatus; //!< The current time sync connector status

1496  enum NtTimeSyncPpsStatus_e timeSyncPpsEnable; //!< The time sync PPS enable. Activated by an application

1497  enum NtTimeSyncPpsSyncMode_e timeSyncPpsSyncMode; //!< When current timeref is PpsIn, this is the sync mode status

1498  uint32_t timeSyncClockAdjustmentMode; //!< The timesync timestamp clock adjustment mode

1499  /* timeSyncClockAdjustmentMode 2 only */

1500  uint32_t timeSyncHardReset; //!< If hard reset of clock is allowed (time jumps)

1501  /* timeSyncClockAdjustmentMode 1 only */

1502  uint32_t timeSyncTimeJumpThreshold; //!< The time sync time jump threshold in seconds

1503 

1504  uint32_t timeSyncTimeOffset; //!< The time sync offset in nanoseconds. Used for NT-TS and PPS caple delay compensation

1505  uint64_t timeSyncPpsSampled; //!< The sampled PPS time. In ns since 1/1 1970 (unix epoch). if NATIVE timestamp format is configured, the epoch is user defined). Note that timeSyncPpsEnable must be true for this parameter to become valid.

1506  int64_t timeSyncTimeSkew; //!< The time skew in ns (0 if not syncing to a time reference). If OS time sync is configured 1us is the resolution, thus skew of 0 means a skew of <1000ns

1507  uint32_t highFrequencySampling; //!< The high frequency sampling status

1508  struct NtInfoTimeSyncSample_s sample[7]; //!< Timestamp sample sets. @ref NtTimeSyncSamplingSrc_e

1509 };

1510 

1511 /**

1512  * NT_INFO_CMD_READ_TIMESYNC_V2 specific data.

1513  * The adapterNo must be initialized for the relevant adapter.

1514  */

1515 struct NtInfoCmdTimeSync_v2_s {

1516  uint8_t adapterNo; //!< The adapter to query

1517  uint8_t Reserved1[2];

1518  struct NtInfoTimeSync_v2_s data; //!< The time sync data

1519 };

1520 

1521 

1522 #define NT_INFO_CMD_READ_TIMESYNC_V3 NT_INFO_CMD_READ_COMPAT_21

1523 

1524 

1525 struct NtInfoTimeSync_v3_s {

1526  uint32_t timeSyncSupported; //!< Is time sync supported by this adapter

1527  uint32_t ptpSupported; //!< Is PTP time sync available on this adapter

1528 

1529  NtTimeSyncConnectorSetting_t timeSyncConnectorExt1; //!< Timesync connector Ext1 setting

1530  NtTimeSyncConnectorSetting_t timeSyncConnectorInt1; //!< Timesync connector Int1 setting

1531  NtTimeSyncConnectorSetting_t timeSyncConnectorInt2; //!< Timesync connector Int2 setting

1532  enum NtTimeSyncReference_e tsRefPrio[4]; //!< Timesync source reference priority list

1533  enum NtTimeSyncReference_e timeRef; //!< The current time reference

1534  enum NtTimeSyncFreqReference_e tsFreqRefPrio[4]; //!< Timesync frequency reference priority list

1535  enum NtTimeSyncFreqReference_e freqRef; //!< The current frequency reference

1536  uint32_t timeSyncNTTSInSyncLimit; //!< The configured NT-TS in-sync limit

1537  uint32_t timeSyncOSInSyncLimit; //!< The configured OS in-sync limit

1538  uint32_t timeSyncPPSInSyncLimit; //!< The configured PPS in-sync limit

1539  uint32_t timeSyncPTPInSyncLimit; //!< The configured PTP in-sync limit

1540  enum NtTimeSyncInSyncStatus_e timeSyncInSyncStatus; //!< The timestamp clock time in-sync/out-of-sync status

1541  enum NtTimeSyncConStatus_e timeSyncCurrentConStatus; //!< The current time sync connector status

1542  enum NtTimeSyncPpsStatus_e timeSyncPpsEnable; //!< The time sync PPS enable. Activated by an application

1543  enum NtTimeSyncPpsSyncMode_e timeSyncPpsSyncMode; //!< When current timeref is PpsIn, this is the sync mode status

1544  uint32_t timeSyncClockAdjustmentMode; //!< The time sync timestamp clock adjustment mode

1545  /* timeSyncClockAdjustmentMode 2 only */

1546  uint32_t timeSyncHardReset; //!< If hard reset of clock is allowed (time jumps)

1547  /* timeSyncClockAdjustmentMode 1 only */

1548  uint32_t timeSyncTimeJumpThreshold; //!< The time sync time jump threshold in seconds

1549 

1550  uint32_t timeSyncTimeOffset; //!< The time sync offset in nanoseconds. Used for NT-TS and PPS caple delay compensation

1551  uint64_t timeSyncPpsSampled; //!< The sampled PPS time. In ns since 1/1 1970 (unix epoch). if NATIVE timestamp format is configured, the epoch is user defined). Note that timeSyncPpsEnable must be true for this parameter to become valid

1552  int64_t timeSyncTimeSkew; //!< The time skew in ns (0 if not syncing to a time reference)

1553  uint32_t highFrequencySampling; //!< The high frequency sampling status

1554  struct NtInfoTimeSyncSample_s sample[7]; //!< Timestamp sample sets. @ref NtTimeSyncSamplingSrc_e

1555 

1556  int64_t timeSyncClockRateAdjustment; //!< The current clock rate adjustment imposed on the TS clock to synchronize to the referenced clock in nanoseconds per second. This is only supported on newer Gen2 adapters (FPGA version must be 46 or above)

1557 

1558  /* Server OS clock synchronization to TS clock */

1559  uint32_t timeSyncAdapterToOSSyncEnabled; //!< Non-zero if this adapter is configured to synchronize the server OS clock

1560  int64_t timeSyncOSClockOffset; //!< The latest read OS clock offset to the adapter TS clock

1561  int64_t timeSyncOSClockRateAdjustment; //!< The current clock rate adjustment imposed on the server OS clock to synchronize to the adapter TS clock.

1562 };

1563 

1564 /**

1565  * NT_INFO_CMD_READ_TIMESYNC_V3 specific data.

1566  * The adapterNo must be initialized for the relevant adapter.

1567  */

1568 struct NtInfoCmdTimeSync_v3_s {

1569  uint8_t adapterNo; //!< The adapter to query

1570  uint8_t Reserved1[2];

1571  struct NtInfoTimeSync_v3_s data; //!< The time sync data

1572 };

1573 

1574 

1575 /***********************************************************************************************/

1576 /* Hostbuffer info version 0 */

1577 /***********************************************************************************************/

1578 #define NT_INFO_CMD_READ_HOSTBUFFER NT_INFO_CMD_READ_COMPAT_3 //!< Host buffer info - the NUMA node, size and feed

1579 /**

1580  * NT_INFO_CMD_READ_PORT_V1 specific data.

1581  * The portNo must be initialized for the relevant port.

1582  */

1583 struct NtInfoHostBuffer_s {

1584  uint8_t numaNode; //!< The NUMA node on which the host buffer resides

1585  uint8_t Reserved1[3];

1586  uint32_t size; //!< The size of the host buffer in bytes

1587  uint32_t feed; //!< The feed index per adapter and type

1588 };

1589 

1590 /**

1591  * NT_INFO_CMD_READ_HOSTBUFFER specific data.

1592  * The adapterNo, hostBufferNo and hostBufferType must be initialized for the relevant adapter, host buffer number and host buffer type.

1593  */

1594 struct NtInfoCmdHostBuffer_s {

1595  uint8_t adapterNo; //!< The adapter to query

1596  uint8_t Reserved1[3];

1597  uint32_t hostBufferNo; //!< The host buffer to query

1598  enum NtNetHostBufferType_e hostBufferType; //!< The host buffer type, that is, CAPTURE or TX

1599  struct NtInfoHostBuffer_s data; //!< The host buffer data

1600 };

1601 

1602 /***********************************************************************************************/

1603 

1604 /***********************************************************************************************/

1605 /* PTP info version 1 */

1606 /***********************************************************************************************/

1607 #define NT_INFO_CMD_READ_PTP_V1 NT_INFO_CMD_READ_COMPAT_15

1608 

1609 /**

1610  * IEEE 1588 PTP time synchronization statistics

1611  */

1612 struct NtPTPSyncStat_s {

1613  uint64_t samples; //!< The number of samples the statistics are calculated on

1614  int64_t jitter; //!< The peak to peak jitter measured

1615  int64_t skew; //!< Latest measured clock skew

1616  int64_t min; //!< The minimum clock skew measured

1617  int64_t max; //!< The maximum clock skew measured

1618  int64_t mean; //!< The calculated mean clock skew (skew-sum/samples)

1619  double stdDevSqr; //!< Calculated squared standard deviation of clock skew when slave, otherwise 0

1620 };

1621 

1622 /**

1623  * PTP information structure

1624  */

1625 struct NtInfoPTP_v1_s {

1626  bool enabled; //!< Is PTP stack configured to be used (slave, master or ptp pps sampling)

1627  struct NtPTPTimestamp_s ts; //!< Timestamp at this info retrieval

1628  struct NtPTPPort_s ptpPort; //!< PTP port information structure

1629  struct NtPTPDataSets_s ptpDataSets; //!< PTP data sets (according to IEEE1588-2008 spec.)

1630  struct NtPTPPortStat_s ptpPortStat; //!< PTP ethernet port statistics

1631  struct NtPTPSyncStat_s stat; //!< In slave mode, stat holds the timesync statistics

1632  struct NtPTPImplCfg_s ptpImplCfg; //!< PTP implementational configuration settings

1633 };

1634 

1635 /**

1636  * NT_INFO_CMD_READ_PTP specific data.

1637  */

1638 struct NtInfoCmdPTP_v1_s {

1639  uint8_t adapterNo; //!< The adapter to query

1640  uint8_t Reserved1[2];

1641  struct NtInfoPTP_v1_s data; //!< Query PTP information structure

1642 };

1643 

1644 

1645 /***********************************************************************************************/

1646 /* PTP info version 0 */

1647 /***********************************************************************************************/

1648 #define NT_INFO_CMD_READ_PTP NT_INFO_CMD_READ_COMPAT_9

1649 

1650 struct NtInfoPTP_s {

1651  bool enabled; //!< Is PTP stack configured to be used (slave, master or ptp pps sampling)

1652  struct NtPTPTimestamp_s ts; //!< Timestamp at this info retrieval

1653  struct NtPTPPort_s ptpPort; //!< PTP port information structure

1654  struct NtPTPDataSets_s ptpDataSets; //!< PTP data sets (according to IEEE1588-2008 spec.)

1655  struct NtPTPPortStat_s ptpPortStat; //!< PTP ethernet port statistics

1656  struct NtPTPSyncStat_s stat; //!< In slave mode, stat holds the timesync statistics

1657 };

1658 /**

1659  * NT_INFO_CMD_READ_PTP specific data.

1660  */

1661 struct NtInfoCmdPTP_s {

1662  uint8_t adapterNo; //!< The adapter to query

1663  uint8_t Reserved1[2];

1664  struct NtInfoPTP_s data; //!< Query PTP information structure

1665 };

1666 

1667 

1668 /***********************************************************************************************/

1669 /* ProductInfo version 0 */

1670 /***********************************************************************************************/

1671 #define NT_INFO_CMD_READ_PRODUCT_INFO NT_INFO_CMD_READ_COMPAT_19

1672 

1673 typedef struct NtInfoProductInfo_s {

1674  enum NtProductInfoType_e infoType; //!< Information from Gen 1, Gen 2, NTBPE or Gen 3 adapter

1675  char ProductId[32]; //!< Product ID (P/N)

1676  char SerialNo[2][32]; //!< Serial number (only index 0 used on Gen 1 otherwise 0 = main, 1 = front)

1677  char PbaId[2][32]; //!< PBA ID (only index 0 used on Gen 1 otherwise 0 = main, 1 = front)

1678  char AvrId[2][32]; //!< AVR version (only on Gen 2)

1679  char CpldVersion[32]; //!< CPLD Version

1680  char fpgaId1[40]; //!< FPGA Image #0 ID

1681  char fpgaId2[40]; //!< FPGA Image #1 ID

1682 } NtInfoProductInfo_t;

1683 

1684 struct NtInfoReadProductInfo_s {

1685  uint8_t adapterNo; //!< Adapter number to query for product information

1686  NtInfoProductInfo_t data; //!< Product Information returned

1687 };

1688 

1689 /***********************************************************************************************/

1690 /* ProductInfo version 1 */

1691 /***********************************************************************************************/

1692 #define NT_INFO_CMD_READ_PRODUCT_INFO_V1 NT_INFO_CMD_READ_COMPAT_22

1693 

1694 /**

1695  * Structure to read product information version 1

1696  */

1697 typedef struct NtInfoProductInfo_v1_s {

1698  enum NtProductInfoType_e infoType; //!< Information from Gen 1, Gen 2, NTBPE or Gen 3 adapter

1699  char ProductId[32]; //!< Product ID (P/N)

1700  char SerialNo[2][32]; //!< Serial number (only index 0 used on Gen 1 otherwise 0 = main, 1 = front)

1701  char PbaId[2][32]; //!< PBA ID (only index 0 used on Gen 1 otherwise 0 = main, 1 = front)

1702  char AvrId[2][32]; //!< AVR version (only on Gen 2)

1703  char CpldVersion[32]; //!< CPLD Version

1704  char fpgaId1[40]; //!< FPGA Image #0 ID

1705  char fpgaId2[40]; //!< FPGA Image #1 ID

1706  uint16_t customId; //!< Custom ID

1707 } NtInfoProductInfo_v1_t;

1708 

1709 

1710 /**

1711  * Product info

1712  */

1713 struct NtInfoReadProductInfo_v1_s {

1714  uint8_t adapterNo; //!< Adapter number to query for product information

1715  NtInfoProductInfo_v1_t data; //!< Product Information returned

1716 };

1717 

1718 /***********************************************************************************************/

1719 /* ProductInfo version 2 */

1720 /***********************************************************************************************/

1721 #define NT_INFO_CMD_READ_PRODUCT_INFO_V2 NT_INFO_CMD_READ_COMPAT_25

1722 

1723 /**

1724  * Structure to read product information

1725  */

1726 typedef struct NtInfoProductInfo_v2_s {

1727  enum NtProductInfoType_e infoType; //!< Information from Gen 1, Gen 2, NTBPE or Gen 3 adapter

1728  char ProductId[32]; //!< Product ID (P/N)

1729  char SerialNo[2][32]; //!< Serial number (only index 0 used on Gen 1 otherwise 0 = main, 1 = front)

1730  char PbaId[2][32]; //!< PBA ID (only index 0 used on Gen 1 otherwise 0 = main, 1 = front)

1731  char AvrId[2][32]; //!< AVR version (only on Gen 2)

1732  char CpldVersion[32]; //!< CPLD Version

1733  char fpgaId1[40]; //!< FPGA Image #0 ID

1734  char fpgaId2[40]; //!< FPGA Image #1 ID

1735  uint16_t customId; //!< Custom ID

1736  uint8_t userId[8]; //!< User ID

1737 } NtInfoProductInfo_v2_t;

1738 

1739 

1740 /**

1741  * Product info

1742  */