In this chapter
This chapter describes the basic time-stamping and time synchronization configuration of a SmartNIC.
Note: These features do not apply to the Intel® Programmable Acceleration Card with Intel® Arria®
10 GX FPGA running Napatech Link™ Capture Software:
- Synchronized transfer of block statistics
- Synchronization of OS time to SmartNIC time
- NT-TS time synchronization
- PPS-triggered SmartNIC clock sampling
- PPS output
- PTP time synchronization