This document has been updated as follows:
| Rev. | Date | Comment |
|---|---|---|
| 1 | 2015-11-25 | Initial version. |
| 2 | 2016-03-24 | Changes have been made in Chapter 1. Sections 2.2, 2.3.4, 2.4 and 2.5 have been added. A number of minor changes have been made. |
| 3 | 2016-07-21 | A number of minor changes have been made. |
| 4 | 2016-12-14 | A number of examples have been updated. |
| 5 | 2017-01-25 | A number of minor changes have been made. |
| 6 | 2017-05-07 | A number of minor changes have been made. |
| 7 | 2017-09-29 | A number of minor changes have been made. |
| 8 | 2018-02-16 | Changes have been made in Sections 2.3 and 2.6. The term accelerator has been changed to SmartNIC. A number of minor changes have been made. |
| 9 | 2018-09-10 | The Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA has been included. A number of minor changes have been made. |
| 10 | 2020-12-09 | A number of minor changes have been made. |
| 11 | 2022-06-03 | Sections 2.6, 2.8 and 2.9 have been added. A number of minor changes have been made. |
| 12 | 2022-10-10 | Section 2.7 has been removed. A few minor changes have been made. |
| 13 | 2023-03-21 | NT400D11 has been included. Changes have been made in Section 2.7 |