- The Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA
IEEE 1588 PTP enables time and frequency synchronization over Ethernet and IP networks. Existing network infrastructure can be utilized, but for optimal performance, switches and routers must be upgraded to PTP-aware models.
Napatech SmartNICs can connect to PTP networks via the external RJ45 time synchronization connector, on the NT200A02 and NT100A01 SmartNICs, or, on other SmartNICs, via the RJ45 10/100BASE-T PTP port on the external time synchronization connector. Connection to a PTP network is not supported over the data ports.
The NT SmartNICs only comply with IEEE 1588-2008 PTP v2.
Master and slave
A Napatech SmartNIC can be configured to operate as a PTP slave in a PTP network to synchronize the SmartNIC time stamp clock to a PTP grandmaster.
A Napatech SmartNIC cannot operate as a PTP grandmaster in a PTP network.
PTP PDV filter
Napatech SmartNICs implement a PDV (packet delay variation) filter for use in telecommunication networks (see PDV filter).
PTP minimum filter
Napatech SmartNICs implement a minimum filter, which is used for filtering out outliers in networks that are not completely PTP-aware (see Minimum filter).
PTP packet delay asymmetry compensation
Napatech SmartNICs have support for network delay asymmetry correction as specified in the IEEE 1588-2008 specification (see PTP delay asymmetry compensation).
NT_INFO_CMD_READ_PTP in the information stream contains information about PTP port status, PTP clock data sets and PTP configuration (see DN-0449).
PTP over Ethernet/LAN provides flexible distribution of time and frequency information, and in most cases PTP is easier to deploy than PPS signal distribution. PTP time synchronization is an obvious option where PTP is already deployed. Combined with SyncE, PTP provides superior synchronization precision.