This section does not apply to NT50B01 nor to the Intel® PAC with Intel® Arria® 10 GX FPGA.
In this section
This section describes the 3 different time synchronization signals supported over the external SMA and/or internal MCX time synchronization connectors/ports by the NT SmartNICs. Configuration of the SmartNICs with respect to time synchronization signals is described in Configuring the Time Synchronization Connectors and the Time Synchronization Time and Frequency Reference Priorities.
The PPS at TTL (transistor-transistor logic) levels (PPS/TTL) signal is used for connecting a 3rd-party equipment PPS output to the input time synchronization connector of an NT SmartNIC. The NT SmartNIC time synchronization input interface is specified in the relevant Hardware Installation Guide. NT SmartNICs can also generate a PPS/TTL output signal.