Introduction

Time-Stamping and Time Synchronization

product_line_custom
Intel® PAC
Napatech SmartNIC
category
User Guide

In this document

This document describes time-stamping and how to use the time synchronization features of the Napatech NT200A02, NT200A01, NT200C01, NT100E3-1-PTP, NT80E3-2-PTP, NT40A01, NT40E3-4-PTP and NT20E3-2-PTP SmartNICs with Napatech Software Suite as well as for the Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA (Intel® PAC with Intel® Arria® 10 GX FPGA or Intel® PAC A10 GX for short) running Napatech Link™ Capture Software.
Note: This document refers to functionality provided by Napatech SmartNICs with fourth-generation architecture (also referred to as 4GA) as well as by the Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA running Napatech Link™ Capture Software. For users of Napatech SmartNICs with third-generation architecture (also referred to as 3GA), please refer to the appropriate documentation relevant for Napatech 3GA SmartNICs.

ntservice.ini parameter examples

Throughout the document a number of configuration examples are shown using parameters in the ntservice.ini file. These parameters are described in ntservice.ini Parameters and in DN-0449.

Ordering information

The latest information on time synchronization accessories (DN-0186) can be found on the Napatech Documentation Portal (docs.napatech.com).

Information on time precision

Additional information on time precision can be found in DN-0778 on www.napatech.com.