Tx configuration : Per port Tx queue. Multiple Tx host buffers to the same egress port will be merged round-robin.
Segment timeout : Packet data will be released every 100usec.
Poll interval : The driver will poll for new data every 100usec.
Host buffer layout: Ring-based. Packets received are retransmitted in the same order unless they are marked for deletion.
Even if data is marked with "TxIgnore=TRUE" via NTPL, the data will be sent across the PCIe bus and the adapter will determine whether data is sent.
The in-line profile creates a large number of interrupts in order to keep latency low.
If multiple streams are utilizing the same egress port they must run with TxNow=True otherwise the time-stamps in the packets will cause jumps in time and result in stalls in the transmit engine.