Verify the NT200C01 Solution

Basic Troubleshooting

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IntelĀ® PAC
Napatech SmartNIC
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User Guide

Analyze, test and verify

Run the diagnostics tool on the NT200C01 solution to perform a traffic test between the two SmartNICs and verify the interconnect cable connection.

NT200C01 solution interconnect cabling

Interconnect cabling between two NT200C01 cards

Example

The following example is the output of the diagnostics tool on the NT200C01 solution.

# /opt/napatech3/bin/diagnostics 
diagnostics (v. 3.0.1.0-caffee)
==============================================================================
System: 3.0.1.0
------------------------------------------------------------------------------
Adapters:  2
Ports:     2
==============================================================================
Adapter 0  NT100E3-1-PTP-ANL Analysis Network Adapter PCIe Gen3 1x100Gb CFP4
------------------------------------------------------------------------------
              Sensor  Unit     Limit   Limit   Value   Sensor   Value   Value
              type               low    high   curr.    state     min     max
------------------------------------------------------------------------------
FPGA          Temp.   [C]        0.0    90.0    61.3   Normal    52.7    64.4
PCI-Bridge    Temp.   [C]      -40.0   110.0    66.7   Normal    58.4    69.5
FAN           Speed   [RPM]     3640    5150    4380   Normal    4350    4440
MCU           Temp.   [C]        0.0    85.0    38.6   Normal    34.8    41.3
PSU0          Temp.   [C]      -40.0   125.0    47.0   Normal    42.0    52.0
PSU1          Temp.   [C]      -40.0   125.0    47.0   Normal    42.0    47.0
PSU2A         Temp.   [C]      -40.0   125.0    72.7   Normal    63.8    75.0
PSU2B         Temp.   [C]      -40.0   125.0    69.2   Normal    61.8    71.6
OSC           Temp.   [C]        0.0    85.0    44.2   Normal    41.5    46.7
EXT           Temp.   [C]        0.0    85.0    40.2   Normal    38.0    42.2
PCB           Temp.   [C]        0.0    85.0    53.0   Normal    45.5    55.0
NT100E3       Power   [W]                       51.9   Normal    48.2    52.9
FPGA          Power   [W]                       27.3   Normal    25.9    32.2
DDR3          Power   [W]                        0.0   Normal     0.0     1.4
NIM           Power   [W]                        7.2   Normal     5.6    10.4
PCI-Bridge    Power   [W]                        5.0   Normal     4.6     6.6
------------------------------------------------------------------------------
Port 0:
CFP4          Temp.   [C]      -15.0    80.0    48.9   Normal    35.6    50.9
GEARBOX       Temp.   [C]        0.0   115.0    62.8   Normal    51.3    64.8
Supply        Voltage [V]       2.79    3.79    3.19   Normal    3.17    3.20
Tx Bias 1     Current [mA]      9.73   89.60   61.83   Normal   61.58   63.05
Tx Bias 2     Current [mA]      9.73   89.60   60.12   Normal   59.87   61.34
Tx Bias 3     Current [mA]      9.73   89.60   59.14   Normal   58.89   60.36
Tx Bias 4     Current [mA]      9.73   89.60   61.09   Normal   60.60   62.07
Tx 1(AVG)     Power   [uW]       179    5606    1701   Normal    1695    1709
Tx 2(AVG)     Power   [uW]       179    5606    1663   Normal    1653    1672
Tx 3(AVG)     Power   [uW]       179    5606    1783   Normal    1776    1793
Tx 4(AVG)     Power   [uW]       179    5606    1530   Normal    1522    1541
Rx 1(AVG)     Power   [uW]        51    3968    1609   Normal       0    1626
Rx 2(AVG)     Power   [uW]        51    3968    1990   Normal       0    2006
Rx 3(AVG)     Power   [uW]        51    3968    1811   Normal       0    1826
Rx 4(AVG)     Power   [uW]        51    3968    1550   Normal       0    1566
------------------------------------------------------------------------------

Analyzing SDRAM:
------------------------------------------------------------------------------
SDRAM Present No
------------------------------------------------------------------------------
Bonded to adapter 1 as Master. Link is UP.  Lane status 3ff
Starting PRBS test
PRBS Test OK
------------------------------------------------------------------------------
Timesync information:
------------------------------------------------------------------------------
PTP timesync available         : Yes
Timesync connector Ext1        : NttsIn 
Timesync connector Int1        : None 
Timesync connector Int2        : None 
Clock reference priority       : OsTime         
Current clock reference        : OsTime         
Frequency reference priority   : FreeRun
Current frequency reference    : FreeRun
Timesync clock adjustmentmode  : 2
Hard clock reset allowed       : yes
Configured NT-TS in-sync limit : 5000 (ns)
Configured OS in-sync limit    : 50000 (ns)
Configured PPS in-sync limit   : 5000 (ns)
Configured PTP in-sync limit   : 5000 (ns)
Timesync performance status:
Current clock skew             : 4 (ns)
Clock in-sync with reference   : Yes
Adapter clock sampled timestamps:
None
------------------------------------------------------------------------------
Traffic test:
------------------------------------------------------------------------------
Receive port 0
Transmit port 0
NOTE: FPGA transmit feature not present on adapter 0 port 0
Sending packet: 10000 of 10000
Received 10000 packets. Success
==============================================================================
Adapter 1  NT100E3-1-PTP-ANL Analysis Network Adapter PCIe Gen3 1x100Gb CFP4
------------------------------------------------------------------------------
              Sensor  Unit     Limit   Limit   Value   Sensor   Value   Value
              type               low    high   curr.    state     min     max
------------------------------------------------------------------------------
FPGA          Temp.   [C]        0.0    90.0    59.0   Normal    53.0    61.7
PCI-Bridge    Temp.   [C]      -40.0   110.0    61.0   Normal    54.9    64.1
FAN           Speed   [RPM]     3640    5150    4050   Normal    4020    4110
MCU           Temp.   [C]        0.0    85.0    30.0   Normal    28.1    32.9
PSU0          Temp.   [C]      -40.0   125.0    47.0   Normal    42.0    47.0
PSU1          Temp.   [C]      -40.0   125.0    42.0   Normal    37.0    42.0
PSU2A         Temp.   [C]      -40.0   125.0    66.2   Normal    57.9    68.2
PSU2B         Temp.   [C]      -40.0   125.0    63.5   Normal    56.6    65.5
OSC           Temp.   [C]        0.0    85.0    40.2   Normal    38.5    42.0
EXT           Temp.   [C]        0.0    85.0    35.5   Normal    34.0    37.7
PCB           Temp.   [C]        0.0    85.0    50.0   Normal    42.5    52.0
NT100E3       Power   [W]                       50.7   Normal    49.8    51.3
FPGA          Power   [W]                       24.1   Normal    21.8    27.1
DDR3          Power   [W]                        0.0   Normal     0.0     0.0
NIM           Power   [W]                        5.6   Normal     4.0     7.2
PCI-Bridge    Power   [W]                        4.3   Normal     3.5     5.5
------------------------------------------------------------------------------
Port 1:
CFP4          Temp.   [C]      -15.0    80.0    54.0   Normal    34.8    56.4
GEARBOX       Temp.   [C]        0.0   115.0    58.5   Normal    47.2    60.5
Supply        Voltage [V]       2.79    3.79    3.20   Normal    3.19    3.21
Tx Bias 1     Current [mA]      9.73   89.60   60.36   Normal   59.87   61.58
Tx Bias 2     Current [mA]      9.73   89.60   60.85   Normal   60.36   62.07
Tx Bias 3     Current [mA]      9.73   89.60   61.09   Normal   60.60   62.07
Tx Bias 4     Current [mA]      9.73   89.60   62.56   Normal   62.31   63.78
Tx 1(AVG)     Power   [uW]       179    5606    1600   Normal    1596    1613
Tx 2(AVG)     Power   [uW]       179    5606    1837   Normal    1825    1846
Tx 3(AVG)     Power   [uW]       179    5606    1726   Normal    1716    1732
Tx 4(AVG)     Power   [uW]       179    5606    1565   Normal    1558    1574
Rx 1(AVG)     Power   [uW]        51    3968    1958   Normal    1907    1989
Rx 2(AVG)     Power   [uW]        51    3968    1786   Normal    1728    1804
Rx 3(AVG)     Power   [uW]        51    3968    1746   Normal    1684    1769
Rx 4(AVG)     Power   [uW]        51    3968    1688   Normal    1639    1702
------------------------------------------------------------------------------

Analyzing SDRAM:
------------------------------------------------------------------------------
SDRAM Present No
------------------------------------------------------------------------------
Bonded to adapter 0 as Slave. Link is UP.  Lane status 3ff
------------------------------------------------------------------------------
Timesync information:
------------------------------------------------------------------------------
PTP timesync available         : Yes
Timesync connector Ext1        : NttsIn 
Timesync connector Int1        : None 
Timesync connector Int2        : None 
Clock reference priority       : OsTime         
Current clock reference        : OsTime         
Frequency reference priority   : FreeRun
Current frequency reference    : FreeRun
Timesync clock adjustmentmode  : 2
Hard clock reset allowed       : yes
Configured NT-TS in-sync limit : 5000 (ns)
Configured OS in-sync limit    : 50000 (ns)
Configured PPS in-sync limit   : 5000 (ns)
Configured PTP in-sync limit   : 5000 (ns)
Timesync performance status:
Current clock skew             : -12 (ns)
Clock in-sync with reference   : Yes
Adapter clock sampled timestamps:
None
------------------------------------------------------------------------------
Traffic test:
------------------------------------------------------------------------------
Receive port 1
Transmit port 1
NOTE: FPGA transmit feature not present on adapter 1 port 1
Sending packet: 10000 of 10000
Received 10000 packets. Success
==============================================================================

Please see DN-0449 for more information on the diagnostics tool.