In this chapter
- A pair of NT100E3-1-PTP SmartNICs.
- A pair of NT40A01 SmartNICs running on the 4 × 10/1 Gbit/s SLB image.
- A pair of NT200A02 SmartNICs running on the 2 × 40 Gbit/s SLB image or the 8 × 10 Gbit/s SLB image.
QPI bypass concept
QuickPath Interconnect (QPI) provides fast connections between multiple processors and I/O hubs.
Direct Data I/O (DDIO) is an enhancement of DMA that allows data to be transferred directly between a device in a PCIe slot and the L3 cache of the processors local to the PCIe slot.
The local L3 cache is polluted by data destined for the remote NUMA node.
The QPI itself causes latency.
The QPI memory write causes a flush of remote L3 cache lines (enforced by the cache coherency protocol).
- A pair of NT100E3-1-PTPs can be bonded as peers so that streams can be redirected to the peer SmartNIC.
- A pair of NT40A01 SmartNICs running on the 4 × 10/1 Gbit/s SLB image or a pair of NT200A02 SmartNICs running on the 2 × 40 Gbit/s SLB image or the 8 × 10 Gbit/s SLB image can be bonded in a master-slave configuration so that all frames received on the master SmartNIC is copied to the slave SmartNIC.