Flowchart Depicting the Upgrade Cycle

Handling FPGA Images

Platform
Napatech SmartNIC
Content Type
User Guide
Capture Software Version
Link™ Capture Software 12.10

The algorithm for changing the primary boot image

This figure shows the algorithm for changing the primary boot image.

Page-1 Process Upload new FPGA image Upload new FPGAimage Process.2 Program image to flash Program image to flash Decision Is quick switch supported by accelerator? Is quick switch supported by SmartNIC? Process.4 Switch image Switch image Process.5 Image is switched by quick switch Image is switched by quick switch Process.7 Determine flash bank to program (0 or 1) Determine flash bank to program (0 or 1) Process.9 Reboot server Reboot server Process.10 Image is switched by CPLD/AVR at reboot Image is switched by CPLD/AVR at reboot Decision.6 New image loaded OK? New image loaded OK? Process.8 Load old image Load old image Decision.11 Confirm or discard image? Confirm or discard image? Process.12 Set image to be primary image Set image to be primary image Dynamic connector Dynamic connector.14 Dynamic connector.15 Dynamic connector.16 Dynamic connector.17 Yes Yes Dynamic connector.18 No No Dynamic connector.19 Dynamic connector.20 Dynamic connector.21 Dynamic connector.22 No No Dynamic connector.23 Yes Yes Dynamic connector.24 Confirm Confirm Terminator imgctrl done imgctrl done Dynamic connector.25 Dynamic connector.28 Dynamic connector.29 Discard Discard Decision.26 Flash programmed OK? Flash programmed OK? Dynamic connector.30 Yes Yes Dynamic connector.31 No No Process.32 Task stated by user input to imgctrl tool Task stated by user input to imgctrl tool Process.33 Task handled by imgctrl tool Task handled by imgctrl tool