NT-TS Time Synchronization System Configurations

Time-Stamping and Time Synchronization

Platform
Intel® PAC
Napatech SmartNIC
Content Type
User Guide

In this chapter

This chapter describes typical system configurations for NT-TS time synchronization.

ntservice.ini code lines are included for reference. Time-Stamping and Time Synchronization Configuration describes configuration in general.
Note: NT-TS time synchronization does not apply to NT50B01 nor to the Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA running Napatech Link™ Capture Software.

Time offset examples

The time offset example in this chapter is calculated in Signal Delay Compensation Example 1.