stream_info_compat.h Source File

Reference Documentation
Platform
Intel® PAC
Napatech SmartNIC
Content Type
Reference Information
Capture Software Version
Link™ Capture Software 12.10
Napatech Software Suite: include/ntapi/stream_info_compat.h Source File
stream_info_compat.h
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1 /*
2  *
3  * Copyright (C) 2023 Napatech A/S.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  * * Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * * Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  * * Neither the name of the Napatech A/S nor the
14  * names of its contributors may be used to endorse or promote products
15  * derived from this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
19  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20  * DISCLAIMED. IN NO EVENT SHALL NAPATECH A/S BE LIABLE FOR ANY
21  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
26  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  *
28  *
29 
30  */
31 
32 /**
33  * @file
34  *
35  * This is the header file of the STREAMTYPE_INFO interface containing
36  * included for backward compatibility structures.
37  *
38  */
39 #ifndef __STREAM_INFO_COMPAT_H__
40 #define __STREAM_INFO_COMPAT_H__
41 
42 #if !defined(_NT_NTAPI_NO_COMPAT)
43 
44 /***********************************************************************************************/
45 /* Info wismode version 0 */
46 /***********************************************************************************************/
47 /**
48  * Structure to hold information about WIS mode
49  */
50 struct NtInfoWis_s {
51  int supported; //!< Is WIS mode supported by the adapter - 1 supported, 0: not supported
52  enum NtWISMode_e mode; //!< Is WIS mode enabled
53 };
54 
55 
56 /***********************************************************************************************/
57 /* Adapter info version 0 */
58 /***********************************************************************************************/
59 #define NT_INFO_CMD_READ_ADAPTER NT_INFO_CMD_READ_COMPAT_0 //!< Adapter info - the number of sensors, ports, PCI ID and bus ID
60 /**
61  * This structure will return the adapter specific info
62  */
63 struct NtInfoAdapter_s {
64  uint8_t numSensors; //!< The number of sensors on this adapter
65  uint8_t Reserved1[3];
66  uint8_t numLevel1Sensors; //!< The number of level 1 sensors on this adapter
67  uint8_t Reserved2[3];
68  uint8_t portOffset; //!< The port numbers of this adapter start at this port offset
69  uint8_t Reserved3[3];
70  uint8_t numPorts; //!< The number of ports on this adapter
71  uint8_t Reserved4[3];
72  uint8_t numPhysicalAdapters; //!< The number of physical adapters grouped in this logical adapter
73  uint8_t Reserved5[3];
74  uint32_t numHostBuffersRx; //!< The number of RX host buffers on this adapter
75  uint32_t numHostBuffersTx; //!< The number of TX host buffers on this adapter
76  uint32_t numTsConnectors; //!< The number of time sync connectors on this adapter
77  enum NtAdapterType_e adapterType; //!< The adapter type
78  enum NtProductType_e productType; //!< The product line type
79  enum NtProfileType_e profile; //!< The profile the adapter is using
80  enum NtProductFamily_e productFamily; //!< The product family
81  char name[128]; //!< The adapter name
82  char serialNo[50]; //!< The adapter serial number
83  /**
84  * AVR version for Gen2 adapters:
85  * avr[0] = Main board AVR,
86  * avr[1] = Front board AVR
87  */
88  struct NtversionAvr_s avr;
89  /**
90  * The bus ID is read as:
91  * 32-bit value,
92  * 4 x 8-bit values defining
93  * function,
94  * device,
95  * bus and
96  * slot
97  */
98  union Ntbusid_u {
99  struct Ntbusid_s {
100  uint32_t function:8; //!< The PCI function number
101  uint32_t device:8; //!< The PCI device number
102  uint32_t bus:8; //!< The PCI bus number
103  uint32_t slot:8; //!< The PCI slot number
104  }s;
105  uint32_t value; //!< The slot, bus, device and function as a 32-bit value
106  } busid;
107 
108  /**
109  * PCI ID is read as:
110  * 32-bit value,
111  * 2 x 16-bit values defining
112  * device ID and
113  * vendor ID
114  */
115  union Ntpciid_u pciid;
116  /**
117  * The FPGA ID of the image currently running on the adapter.
118  * The format is: item-product-version-revision-build.
119  * For example, 200-9114-40-01-1023.
120  */
121  union Ntfpgaid_u fpgaid;
122  uint32_t extendedDescriptor; //!< Is the adapter running with extended descriptors
123  enum NtPacketDescriptorType_e descriptorType; //!< The descriptor type used
124  enum NtTimestampType_e timestampType; //!< The timestamp type used by the adapter
125  enum NtTimestampMethod_e timestampMethod; //!< The timestamp method (SOF/EOF) used by the adapter
126 };
127 
128 /**
129  * NT_INFO_CMD_READ_ADAPTER specific data.
130  * The adapterNo must be initialized for the relevant adapter.
131  */
132 struct NtInfoCmdAdapter_s {
133  uint8_t adapterNo; //!< The adapter to query
134  uint8_t Reserved1[3];
135  struct NtInfoAdapter_s data; //!< The adapter data
136 };
137 
138 /***********************************************************************************************/
139 /* Adapter info version 1 */
140 /***********************************************************************************************/
141 #define NT_INFO_CMD_READ_ADAPTER_V1 NT_INFO_CMD_READ_COMPAT_5 //!< Adapter info - the number of sensors, ports, PCI ID and bus ID
142 /**
143  * This structure will return the adapter specific info
144  */
145 struct NtInfoAdapter_v1_s {
146  uint8_t numSensors; //!< The number of sensors on this adapter
147  uint8_t Reserved1[3];
148  uint8_t numLevel1Sensors; //!< The number of level 1 sensors on this adapter
149  uint8_t Reserved2[3];
150  uint8_t portOffset; //!< The port numbers of this adapter start at this port offset
151  uint8_t Reserved3[3];
152  uint8_t numPorts; //!< The number of ports on this adapter
153  uint8_t Reserved4[3];
154  uint8_t numPhysicalAdapters; //!< The number of physical adapters grouped in this logical adapter
155  uint8_t Reserved5[3];
156  uint32_t numHostBuffersRx; //!< The number of RX host buffers on this adapter
157  uint32_t numHostBuffersTx; //!< The number of TX host buffers on this adapter
158  uint32_t numTsConnectors; //!< The number of time sync connectors on this adapter
159  enum NtAdapterType_e adapterType; //!< The adapter type
160  enum NtProductType_e productType; //!< The product line type
161  enum NtProfileType_e profile; //!< The profile the adapter is using
162  uint32_t supportedProfilesBitmask; //!< The profiles supported by the adapter - the value is represented as a bitmask of @ref NtProfileType_e values
163  enum NtProductFamily_e productFamily; //!< The product family
164  char name[128]; //!< The adapter name
165  char serialNo[50]; //!< The adapter serial number
166  /**
167  * AVR version for Gen2 adapters:
168  * avr[0] = Main board AVR,
169  * avr[1] = Front board AVR
170  */
171  struct NtversionAvr_s avr;
172  /**
173  * The bus ID is read as:
174  * 32-bit value,
175  * 4 x 8-bit values defining
176  * function,
177  * device,
178  * bus and
179  * slot
180  */
181  union Ntbusid_v1_u {
182  struct Ntbusid_v1_s {
183  uint32_t function:8; //!< The PCI function number
184  uint32_t device:8; //!< The PCI device number
185  uint32_t bus:8; //!< The PCI bus number
186  uint32_t slot:8; //!< The PCI domain number
187  }s;
188  uint32_t value; //!< The domain, bus, device and function as a 32-bit value
189  } busid;
190  /**
191  * PCI ID is read as:
192  * 32-bit value,
193  * 2 x 16-bit values defining
194  * device ID and
195  * vendor ID
196  */
197  union Ntpciid_u pciid;
198  /**
199  * The FPGA ID of the image currently running on the adapter.
200  * The format is: item-product-version-revision-build.
201  * For example, 200-9114-40-01-1023.
202  */
203  union Ntfpgaid_u fpgaid;
204  uint32_t extendedDescriptor; //!< The extended descriptor in use by RX - if 0 then no extended is used
205  uint32_t supportedExtendedDescriptorsBitmask; //!< Bitmask of supported extended descriptors, for example, if bit 7 is set then extended descriptor 7 is supported, and if bit 8 it set then extended descriptor 8 is supported
206  enum NtPacketDescriptorType_e descriptorType; //!< The descriptor type used
207  enum NtTimestampType_e timestampType; //!< The time stamp type used by the adapter
208  enum NtTimestampMethod_e timestampMethod; //!< The time stamp method (SOF/EOF) used by the adapter
209 
210  enum NtTxTimingMethod_e txTiming; //!< The TX timing
211  struct NtInfoWis_s wisMode;
212  enum NtTimestampInjectOffsetMode_e tsInjectModeOffset; //!< Time stamp injection offset mode
213  struct NtInfoGlobalSync_s globalSync; //!< Global sync status
214 };
215 
216 /**
217  * NT_INFO_CMD_READ_ADAPTER_V1 specific data.
218  * The adapterNo must be initialized for the relevant adapter.
219  */
220 struct NtInfoCmdAdapter_v1_s {
221  uint8_t adapterNo; //!< The adapter to query
222  uint8_t Reserved1[3];
223  struct NtInfoAdapter_v1_s data; //!< The adapter data
224 };
225 
226 /***********************************************************************************************/
227 /* Adapter info version 2 */
228 /***********************************************************************************************/
229 #define NT_INFO_CMD_READ_ADAPTER_V2 NT_INFO_CMD_READ_COMPAT_7 //!< Adapter info - the number of sensors, ports, PCI ID and bus ID
230 /**
231  * This structure will return the adapter specific info version 2.
232  * Must be a mirror of NtInfoAdapter_s with version 2 variables added
233  * to the bottom.
234  */
235 struct NtInfoAdapter_v2_s {
236  uint8_t numSensors; //!< The number of sensors on this adapter
237  uint8_t Reserved1[3];
238  uint8_t numLevel1Sensors; //!< The number of level 1 sensors on this adapter
239  uint8_t Reserved2[3];
240  uint8_t portOffset; //!< The port numbers of this adapter start at this port offset
241  uint8_t Reserved3[3];
242  uint8_t numPorts; //!< The number of ports on this adapter
243  uint8_t Reserved4[3];
244  uint8_t numPhysicalAdapters; //!< The number of physical adapters grouped in this logical adapter
245  uint8_t Reserved5[3];
246  uint32_t numHostBuffersRx; //!< The number of RX host buffers on this adapter
247  uint32_t numHostBuffersTx; //!< The number of TX host buffers on this adapter
248  uint32_t numTsConnectors; //!< The number of time sync connectors on this adapter
249  enum NtAdapterType_e adapterType; //!< The adapter type
250  enum NtProductType_e productType; //!< The product line type
251  enum NtProfileType_e profile; //!< The profile the adapter is using
252  uint32_t supportedProfilesBitmask; //!< The profiles supported by the adapter - the value is represented as a bitmask of @ref NtProfileType_e values
253  uint32_t adapterFeatures; //!< The features supported by the adapter - the value is represented as a bitmask of @ref NtFeatureType_e values
254  enum NtProductFamily_e productFamily; //!< The product family
255  char name[128]; //!< The adapter name
256  char serialNo[50]; //!< The adapter serial number
257  /**
258  * AVR version for Gen2 adapters:
259  * avr[0] = Main board AVR,
260  * avr[1] = Front board AVR
261  */
262  struct NtversionAvr_s avr;
263 
264  /**
265  * The bus ID is read as:
266  * 32-bit value,
267  * 4 x 8-bit values defining
268  * function,
269  * device,
270  * bus and
271  * slot
272  */
273  union Ntbusid_v2_u {
274  struct Ntbusid_v2_s {
275  uint32_t function:8; //!< The PCI function number
276  uint32_t device:8; //!< The PCI device number
277  uint32_t bus:8; //!< The PCI bus number
278  uint32_t slot:8; //!< The PCI slot number
279  }s;
280  uint32_t value; //!< The slot, bus, device and function as a 32-bit value
281  } busid;
282  /**
283  * PCI ID is read as:
284  * 32-bit value,
285  * 2 x 16-bit values defining
286  * device ID and
287  * vendor ID
288  */
289  union Ntpciid_u pciid;
290  struct NtInfoPCIeInfo_s pciInfo; //!< Information about the PCI bus.
291  /**
292  * The FPGA ID of the image currently running on the adapter.
293  * The format is: item-product-version-revision-build.
294  * For example, 200-9114-40-01-1023.
295  */
296  union Ntfpgaid_u fpgaid;
297  struct NtInfoSDRAMInfo_s sdramInfo; //!< The SDRAM information
298  uint32_t extendedDescriptor; //!< The extended descriptor in use by RX - if 0 then no extended is used
299  uint32_t supportedExtendedDescriptorsBitmask; //!< Bitmask of supported extended descriptors, for example, if bit 7 is set then extended descriptor 7 is supported, and if bit 8 it set then extended descriptor 8 is supported
300  enum NtPacketDescriptorType_e descriptorType; //!< The descriptor type used
301  enum NtTimestampType_e timestampType; //!< The time stamp type used by the adapter
302  enum NtTimestampMethod_e timestampMethod; //!< The time stamp method (SOF/EOF) used by the adapter
303  enum NtTxTimingMethod_e txTiming; //!< The TX timing
304  struct NtInfoWis_s wisMode;
305  enum NtTimestampInjectOffsetMode_e tsInjectModeOffset; //!< Time stamp injection offset mode
306  struct NtInfoGlobalSync_s globalSync; //!< Global sync status
307 };
308 
309 /**
310  * NT_INFO_CMD_READ_ADAPTER_V2 specific data.
311  * The adapterNo must be initialized for the relevant adapter.
312  */
313 struct NtInfoCmdAdapter_v2_s {
314  uint8_t adapterNo; //!< The adapter to query
315  uint8_t Reserved1[3];
316  struct NtInfoAdapter_v2_s data; //!< The adapter data
317 };
318 
319 /***********************************************************************************************/
320 /* Adapter info version 3 */
321 /***********************************************************************************************/
322 #define NT_INFO_CMD_READ_ADAPTER_V3 NT_INFO_CMD_READ_COMPAT_11 //!< Adapter info - the number of sensors, ports, PCI ID and bus ID
323 
324 /**
325  * This structure will return the adapter specific info version 3.
326  * Must be a mirror of NtInfoAdapter_s with version 3 variables added
327  * to the bottom.
328  */
329 struct NtInfoAdapter_v3_s {
330  uint8_t numSensors; //!< The number of sensors on this adapter
331  uint8_t Reserved1[3];
332  uint8_t numLevel1Sensors; //!< The number of level 1 sensors on this adapter
333  uint8_t Reserved2[3];
334  uint8_t portOffset; //!< The port numbers of this adapter start at this port offset
335  uint8_t Reserved3[3];
336  uint8_t numPorts; //!< The number of ports on this adapter
337  uint8_t Reserved4[3];
338  uint8_t numPhysicalAdapters; //!< The number of physical adapters grouped in this logical adapter
339  uint8_t Reserved5[3];
340  uint32_t numHostBuffersRx; //!< The number of RX host buffers on this adapter
341  uint32_t numHostBuffersTx; //!< The number of TX host buffers on this adapter
342  uint32_t numTsConnectors; //!< The number of time sync connectors on this adapter
343  enum NtAdapterType_e adapterType; //!< The adapter type
344  enum NtProductType_e productType; //!< The product line type
345  enum NtProfileType_e profile; //!< The profile the adapter is using
346  uint32_t supportedProfilesBitmask; //!< The profiles supported by the adapter - the value is represented as a bitmask of @ref NtProfileType_e values
347  uint32_t adapterFeatures; //!< The features supported by the adapter - the value is represented as a bitmask of @ref NtFeatureType_e values
348  enum NtProductFamily_e productFamily; //!< The product family
349  char name[128]; //!< The adapter name
350  char serialNo[50]; //!< The adapter serial number
351  /**
352  * AVR version for Gen2 adapters:
353  * avr[0] = Main board AVR,
354  * avr[1] = Front board AVR
355  */
356  struct NtversionAvr_s avr;
357 
358  /**
359  * The bus ID of the device
360  */
361  union Ntbusid_v3_u {
362  struct Ntbusid_v3_s {
363  uint32_t function:3; //!< The PCI function number
364  uint32_t device:5; //!< The PCI device number
365  uint32_t bus:8; //!< The PCI bus number
366  uint32_t domain:16; //!< The PCI domain number
367  }s;
368  uint32_t value; //!< The domain, bus, device and function as a 32-bit value
369  } busid;
370  /**
371  * PCI ID is read as:
372  * 32-bit value,
373  * 2 x 16-bit values defining
374  * device ID and
375  * vendor ID
376  */
377  union Ntpciid_u pciid;
378  struct NtInfoPCIeInfo_s pciInfo; //!< Information about the PCI bus.
379  /**
380  * The FPGA ID of the image currently running on the adapter.
381  * The format is: item-product-version-revision-build.
382  * For example, 200-9114-40-01-1023.
383  */
384  union Ntfpgaid_u fpgaid;
385  struct NtInfoSDRAMInfo_s sdramInfo; //!< The SDRAM information
386  uint32_t extendedDescriptor; //!< The extended descriptor in use by RX - if 0 then no extended is used
387  uint32_t supportedExtendedDescriptorsBitmask; //!< Bitmask of supported extended descriptors, for example, if bit 7 is set then extended descriptor 7 is supported, and if bit 8 it set then extended descriptor 8 is supported
388  enum NtPacketDescriptorType_e descriptorType; //!< The descriptor type used
389  enum NtTimestampType_e timestampType; //!< The time stamp type used by the adapter
390  enum NtTimestampMethod_e timestampMethod; //!< The time stamp method (SOF/EOF) used by the adapter
391  enum NtTxTimingMethod_e txTiming; //!< The TX timing
392  struct NtInfoWis_s wisMode;
393  enum NtTimestampInjectOffsetMode_e tsInjectModeOffset; //!< Time stamp injection offset mode
394  struct NtInfoGlobalSync_s globalSync; //!< Global sync status
395 };
396 
397 /**
398  * NT_INFO_CMD_READ_ADAPTER_V3 specific data.
399  * The adapterNo must be initialized for the relevant adapter.
400  */
401 struct NtInfoCmdAdapter_v3_s {
402  uint8_t adapterNo; //!< The adapter to query
403  uint8_t Reserved1[3];
404  struct NtInfoAdapter_v3_s data; //!< The adapter data
405 };
406 
407 
408 /***********************************************************************************************/
409 /* Adapter info version 4 */
410 /***********************************************************************************************/
411 #define NT_INFO_CMD_READ_ADAPTER_V4 NT_INFO_CMD_READ_COMPAT_13 //!< Adapter info - the number of sensors, ports, PCI ID and bus ID
412 
413 enum {
414  AVR_NOT_VALID = 0, //!< No valid AVR data
415  AVR_VALID = 1, //!< Valid AVR data for mainboard and front board has been filled in the structure
416 };
417 
418 /**
419  * This structure will return the adapter specific info version 4.
420  * Must be a mirror of NtInfoAdapter_s with version 4 variables added
421  * to the bottom.
422  */
423 struct NtInfoAdapter_v4_s {
424  uint8_t numSensors; //!< The number of sensors on this adapter
425  uint8_t Reserved1[3];
426  uint8_t numLevel1Sensors; //!< The number of level 1 sensors on this adapter
427  uint8_t Reserved2[3];
428  uint8_t portOffset; //!< The port numbers of this adapter start at this port offset
429  uint8_t Reserved3[3];
430  uint8_t numPorts; //!< The number of ports on this adapter
431  uint8_t Reserved4[3];
432  uint8_t numPhysicalAdapters; //!< The number of physical adapters grouped in this logical adapter
433  uint8_t Reserved5[3];
434  uint32_t numHostBuffersRx; //!< The number of RX host buffers on this adapter
435  uint32_t numHostBuffersTx; //!< The number of TX host buffers on this adapter
436  uint32_t numTsConnectors; //!< The number of time sync connectors on this adapter
437  enum NtAdapterType_e adapterType; //!< The adapter type
438  enum NtProductType_e productType; //!< The product line type
439  enum NtProfileType_e profile; //!< The profile the adapter is using
440  uint32_t supportedProfilesBitmask; //!< The profiles supported by the adapter - the value is represented as a bitmask of @ref NtProfileType_e values
441  uint32_t adapterFeatures; //!< The features supported by the adapter - the value is represented as a bitmask of @ref NtFeatureType_e values
442  enum NtProductFamily_e productFamily; //!< The product family
443  char name[128]; //!< The adapter name
444  char serialNo[50]; //!< The adapter serial number
445  /**
446  * AVR version for Gen2 adapters:
447  * avr[0] = Main board AVR,
448  * avr[1] = Front board AVR
449  */
450  struct NtversionAvr_s avr;
451 
452  /**
453  * The bus ID of the device
454  */
455  union Ntbusid_v4_u {
456  struct Ntbusid_v4_s {
457  uint32_t function:3; //!< The PCI function number
458  uint32_t device:5; //!< The PCI device number
459  uint32_t bus:8; //!< The PCI bus number
460  uint32_t domain:16; //!< The PCI domain number
461  }s;
462  uint32_t value; //!< The domain, bus, device and function as a 32-bit value
463  } busid;
464  /**
465  * PCI ID is read as:
466  * 32-bit value,
467  * 2 x 16-bit values defining
468  * device ID and
469  * vendor ID
470  */
471  union Ntpciid_u pciid;
472  struct NtInfoPCIeInfo_s pciInfo; //!< Information about the PCI bus.
473  /**
474  * The FPGA ID of the image currently running on the adapter.
475  * The format is: item-product-version-revision-build.
476  * For example, 200-9114-40-01-1023.
477  */
478  union Ntfpgaid_u fpgaid;
479  struct NtInfoSDRAMInfo_s sdramInfo; //!< The SDRAM information
480  uint32_t extendedDescriptor; //!< The extended descriptor in use by RX - if 0 then no extended is used
481  uint32_t supportedExtendedDescriptorsBitmask; //!< Bitmask of supported extended descriptors, for example, if bit 7 is set then extended descriptor 7 is supported, and if bit 8 it set then extended descriptor 8 is supported
482  enum NtPacketDescriptorType_e descriptorType; //!< The descriptor type used
483  enum NtTimestampType_e timestampType; //!< The time stamp type used by the adapter
484  enum NtTimestampMethod_e timestampMethod; //!< The time stamp method (SOF/EOF) used by the adapter
485  enum NtTxTimingMethod_e txTiming; //!< The TX timing
486  struct NtInfoWis_s wisMode; //!< Wis mode status
487  enum NtTimestampInjectOffsetMode_e tsInjectModeOffset; //!< Time stamp injection offset mode
488  struct NtInfoGlobalSync_s globalSync; //!< Global sync status
489  NtInfoBondingInfo_t bondingInfo; //!< Adapter Bonding status
490 };
491 
492 /**
493  * NT_INFO_CMD_READ_ADAPTER_V4 specific data.
494  * The adapterNo must be initialized for the relevant adapter.
495  */
496 struct NtInfoCmdAdapter_v4_s {
497  uint8_t adapterNo; //!< The adapter to query
498  uint8_t Reserved1[3];
499  struct NtInfoAdapter_v4_s data; //!< The adapter data
500 };
501 
502 /***********************************************************************************************/
503 /* Adapter info version 5 */
504 /***********************************************************************************************/
505 #define NT_INFO_CMD_READ_ADAPTER_V5 NT_INFO_CMD_READ_COMPAT_17 //!< Adapter info - the number of sensors, ports, PCI ID and bus ID
506 
507 /**
508  * This structure will return the adapter specific info version 5.
509  * Must be a mirror of NtInfoAdapter_v4_s with version 5 variables added
510  * to the bottom.
511  */
512 struct NtInfoAdapter_v5_s {
513  uint8_t numSensors; //!< The number of sensors on this adapter
514  uint8_t Reserved1[3];
515  uint8_t numLevel1Sensors; //!< The number of level 1 sensors on this adapter
516  uint8_t Reserved2[3];
517  uint8_t portOffset; //!< The port numbers of this adapter start at this port offset
518  uint8_t Reserved3[3];
519  uint8_t numPorts; //!< The number of ports on this adapter
520  uint8_t Reserved4[3];
521  uint8_t numPhysicalAdapters; //!< The number of physical adapters grouped in this logical adapter
522  uint8_t Reserved5[3];
523  uint32_t numHostBuffersRx; //!< The number of RX host buffers on this adapter
524  uint32_t numHostBuffersTx; //!< The number of TX host buffers on this adapter
525  uint32_t numTsConnectors; //!< The number of time sync connectors on this adapter
526  enum NtAdapterType_e adapterType; //!< The adapter type
527  enum NtProductType_e productType; //!< The product line type
528  enum NtProfileType_e profile; //!< The profile the adapter is using
529  uint32_t supportedProfilesBitmask; //!< The profiles supported by the adapter - the value is represented as a bitmask of @ref NtProfileType_e values
530  uint32_t adapterFeatures; //!< The features supported by the adapter - the value is represented as a bitmask of @ref NtFeatureType_e values
531  enum NtProductFamily_e productFamily; //!< The product family
532  char name[128]; //!< The adapter name
533  char serialNo[50]; //!< The adapter serial number
534  /**
535  * AVR version for Gen2 adapters:
536  * avr[0] = Main board AVR,
537  * avr[1] = Front board AVR
538  */
539  struct NtversionAvr_s avr;
540 
541  /**
542  * The bus ID of the device
543  */
544  union Ntbusid_v5_u {
545  struct Ntbusid_v5_s {
546  uint32_t function:3; //!< The PCI function number
547  uint32_t device:5; //!< The PCI device number
548  uint32_t bus:8; //!< The PCI bus number
549  uint32_t domain:16; //!< The PCI domain number
550  }s;
551  uint32_t value; //!< The domain, bus, device and function as a 32-bit value
552  } busid;
553  /**
554  * PCI ID is read as:
555  * 32-bit value,
556  * 2 x 16-bit values defining
557  * device ID and
558  * vendor ID
559  */
560  union Ntpciid_u pciid;
561  struct NtInfoPCIeInfo_s pciInfo; //!< Information about the PCI bus.
562  /**
563  * The FPGA ID of the image currently running on the adapter.
564  * The format is: item-product-version-revision-build.
565  * For example, 200-9114-40-01-1023.
566  */
567  union Ntfpgaid_u fpgaid;
568  struct NtInfoSDRAMInfo_s sdramInfo; //!< The SDRAM information
569  uint32_t extendedDescriptor; //!< The extended descriptor in use by RX - if 0 then no extended is used
570  uint32_t supportedExtendedDescriptorsBitmask; //!< Bitmask of supported extended descriptors, for example, if bit 7 is set then extended descriptor 7 is supported, and if bit 8 it set then extended descriptor 8 is supported
571  enum NtPacketDescriptorType_e descriptorType; //!< The descriptor type used
572  enum NtTimestampType_e timestampType; //!< The time stamp type used by the adapter
573  enum NtTimestampMethod_e timestampMethod; //!< The time stamp method (SOF/EOF) used by the adapter
574  enum NtTxTimingMethod_e txTiming; //!< The TX timing
575  struct NtInfoWis_v1_s wisMode; //!< Wis mode status
576  enum NtTimestampInjectOffsetMode_e tsInjectModeOffset; //!< Time stamp injection offset mode
577  struct NtInfoGlobalSync_s globalSync; //!< Global sync status
578  NtInfoBondingInfo_t bondingInfo; //!< Adapter Bonding status
579  enum NtFeatureLevel_e featureLevel; //!< Adapter/FPGA feature level
580 };
581 
582 /**
583  * NT_INFO_CMD_READ_ADAPTER_V6 specific data.
584  * The adapterNo must be initialized for the relevant adapter.
585  */
586 struct NtInfoCmdAdapter_v5_s {
587  uint8_t adapterNo; //!< The adapter to query
588  uint8_t Reserved1[3];
589  struct NtInfoAdapter_v5_s data; //!< The adapter data
590 };
591 
592 /***********************************************************************************************/
593 /* Port info version 0 */
594 /***********************************************************************************************/
595 #define NT_INFO_CMD_READ_PORT NT_INFO_CMD_READ_COMPAT_1 //!< Port info - the port state, speed and duplex
596 /**
597  * This structure will return the port specific information
598  */
599 typedef struct NtInfoPort_s {
600  enum NtPortType_e type; //!< The interface type
601  enum NtLinkState_e state; //!< The port up or down
602  enum NtLinkSpeed_e speed; //!< The interface speed
603  enum NtLinkDuplex_e duplex; //!< The duplex mode
604  int32_t flow; //!< 0 = No flow control, 1 = Flow control
605  enum NtLinkMDI_e mdi; //!< 0 = auto, 1 = MDI, 2 = MDIX
606  uint8_t macAddress[6]; //!< The MAC address of the interface
607  uint16_t maxFrameSize; //!< The current maximum frame size
608  /**
609  * Capabilities reflect what the port is capable of, that is what speed/duplex is possible. For example,
610  * if only 100 M full duplex is available, the capabilities would
611  * show:
612  * halfDuplexMask=0.
613  * fullDuplexMask=NT_LINK_SPEED_100M.
614  * Other capabilities are min/max transmit sizes.
615  */
616  struct NtLinkCapabilities_s capabilities; //!< The link capabilities
617  uint8_t adapterNo; //!< The adapter that has the port
618  uint8_t Reserved1[3];
619  uint8_t numSensors; //!< The number of sensors on this port
620  uint8_t Reserved2[3];
621  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port
622  uint8_t Reserved3[3];
623  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port
624  uint8_t Reserved4[3];
625 
626  /**
627  * NIM model information
628  */
629  enum NtNimIdentifier_e nim_id; //!< NIM identifier
630  uint8_t vendor_name[17]; //!< NIM Vendor name
631  uint8_t product_no[17]; //!< NIM product number
632  uint8_t serial_no[17]; //!< NIM serial number
633  uint8_t date[9]; //!< NIM vendors manufacturing date
634  uint8_t revision[5]; //!< NIM vendor revision
635  uint8_t power_level_req; //!< NIM required power level
636  uint8_t power_level_curr; //!< NIM current power level
637  struct NtNIMLinkLength_s link_length;
638 } NtInfoPort_t;
639 
640 /**
641  * NT_INFO_CMD_READ_PORT specific data.
642  * The portNo must be initialized for the relevant port.
643  */
644 struct NtInfoCmdPort_s {
645  uint8_t portNo; //!< The port to query
646  uint8_t Reserved1[3];
647  struct NtInfoPort_s data; //!< The port data
648 };
649 /***********************************************************************************************/
650 /* Port info version 1 */
651 /***********************************************************************************************/
652 #define NT_INFO_CMD_READ_PORT_V1 NT_INFO_CMD_READ_COMPAT_6 //!< Port info - the port state, speed and duplex
653 /**
654  * This structure will return the port specific information version 1.
655  * Must be a mirror of NtInfoPort_s with version 1 variables added
656  * to the bottom.
657  */
658 struct NtInfoPort_v1_s {
659  enum NtPortType_e type; //!< The interface type
660  enum NtLinkState_e state; //!< The port up or down
661  enum NtLinkSpeed_e speed; //!< The interface speed
662  enum NtLinkDuplex_e duplex; //!< The duplex mode
663  int32_t flow; //!< 0 = no flow control, 1 = flow control
664  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX
665  uint8_t macAddress[6]; //!< The MAC address of the interface
666  uint16_t maxFrameSize; //!< The current maximum frame size
667  /**
668  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,
669  * if only 100 M full duplex is available, the capabilities would
670  * show:
671  * halfDuplexMask=0.
672  * fullDuplexMask=NT_LINK_SPEED_100M.
673  * Other capabilities are min/max transmit sizes.
674  */
675  struct NtLinkCapabilities_s capabilities; //!< The link capabilities
676  uint8_t adapterNo; //!< The adapter that has the port
677  uint8_t Reserved1[3];
678  uint8_t numSensors; //!< The number of sensors on this port
679  uint8_t Reserved2[3];
680  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port
681  uint8_t Reserved3[3];
682  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port
683  uint8_t Reserved4[3];
684 
685  /**
686  * NIM model information
687  */
688  enum NtNimIdentifier_e nim_id; //!< NIM identifier
689  uint8_t vendor_name[17]; //!< NIM Vendor name
690  uint8_t product_no[17]; //!< NIM product number
691  uint8_t serial_no[17]; //!< NIM serial number
692  uint8_t date[9]; //!< NIM vendors manufacturing date
693  uint8_t revision[5]; //!< NIM vendor revision
694  uint8_t power_level_req; //!< NIM required power level
695  uint8_t power_level_curr; //!< NIM current power level
696  struct NtNIMLinkLength_s link_length;
697 
698  /**
699  * Adapter information
700  */
701  struct NtInfoAdapter_v1_s adapterInfo; // Adapter information
702  /**
703  * Bypass port information
704  */
705  struct NtBypassPortInfo_s bypass; // Bypass port information
706 };
707 
708 /**
709  * NT_INFO_CMD_READ_PORT_V1 specific data.
710  * The portNo must be initialized for the relevant port.
711  */
712 struct NtInfoCmdPort_v1_s {
713  uint8_t portNo; //!< The port to query
714  uint8_t Reserved1[3];
715  struct NtInfoPort_v1_s data; //!< The port data
716 };
717 
718 
719 /***********************************************************************************************/
720 /* Port info version 2 */
721 /***********************************************************************************************/
722 #define NT_INFO_CMD_READ_PORT_V2 NT_INFO_CMD_READ_COMPAT_8 //!< Port info - the port state, speed and duplex
723 /**
724  * This structure will return the port specific information version 2.
725  * Must be a mirror of NtInfoPort_v1_s with version 2 variables added
726  * to the bottom.
727  */
728 struct NtInfoPort_v2_s {
729  enum NtPortType_e type; //!< The interface type
730  enum NtLinkState_e state; //!< The port up or down
731  enum NtLinkSpeed_e speed; //!< The interface speed
732  enum NtLinkDuplex_e duplex; //!< The duplex mode
733  int32_t flow; //!< 0 = no flow control, 1 = flow control
734  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX
735  uint8_t macAddress[6]; //!< The MAC address of the interface
736  uint16_t maxFrameSize; //!< The current maximum frame size
737  /**
738  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,
739  * if only 100 M full duplex is available, the capabilities would
740  * show:
741  * halfDuplexMask=0.
742  * fullDuplexMask=NT_LINK_SPEED_100M.
743  * Other capabilities are min/max transmit sizes.
744  */
745  struct NtLinkCapabilities_s capabilities; //!< The link capabilities
746  uint8_t adapterNo; //!< The adapter that has the port
747  uint8_t Reserved1[3];
748  uint8_t numSensors; //!< The number of sensors on this port
749  uint8_t Reserved2[3];
750  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port
751  uint8_t Reserved3[3];
752  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port
753  uint8_t Reserved4[3];
754 
755  /**
756  * NIM model information
757  */
758  enum NtNimIdentifier_e nim_id; //!< NIM identifier
759  uint8_t vendor_name[17]; //!< NIM Vendor name
760  uint8_t product_no[17]; //!< NIM product number
761  uint8_t serial_no[17]; //!< NIM serial number
762  uint8_t date[9]; //!< NIM vendors manufacturing date
763  uint8_t revision[5]; //!< NIM vendor revision
764  uint8_t power_level_req; //!< NIM required power level
765  uint8_t power_level_curr; //!< NIM current power level
766  struct NtNIMLinkLength_s link_length;
767 
768  /**
769  * Adapter information
770  */
771  struct NtInfoAdapter_v2_s adapterInfo; // Adapter information
772  /**
773  * Bypass port information
774  */
775  struct NtBypassPortInfo_s bypass; // Bypass port information
776 };
777 
778 /**
779  * NT_INFO_CMD_READ_PORT_V2 specific data.
780  * The portNo must be initialized for the relevant port.
781  */
782 struct NtInfoCmdPort_v2_s {
783  uint8_t portNo; //!< The port to query
784  uint8_t Reserved1[3];
785  struct NtInfoPort_v2_s data; //!< The port data
786 };
787 
788 /***********************************************************************************************/
789 /* Port info version 3 */
790 /***********************************************************************************************/
791 #define NT_INFO_CMD_READ_PORT_V3 NT_INFO_CMD_READ_COMPAT_12 //!< Port info - the port state, speed and duplex
792 
793 
794 /**
795  * This structure will return the port specific information version 3.
796  * Must be a mirror of NtInfoPort_v2_s with version 3 variables added
797  * to the bottom.
798  */
799 struct NtInfoPort_v3_s {
800  enum NtPortType_e type; //!< The interface type
801  enum NtLinkState_e state; //!< The port up or down
802  enum NtLinkSpeed_e speed; //!< The interface speed
803  enum NtLinkDuplex_e duplex; //!< The duplex mode
804  int32_t flow; //!< 0 = no flow control, 1 = flow control
805  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX
806  uint8_t macAddress[6]; //!< The MAC address of the interface
807  uint16_t maxFrameSize; //!< The current maximum frame size
808  /**
809  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,
810  * if only 100 M full duplex is available, the capabilities would
811  * show:
812  * halfDuplexMask=0.
813  * fullDuplexMask=NT_LINK_SPEED_100M.
814  * Other capabilities are min/max transmit sizes.
815  */
816  struct NtLinkCapabilities_s capabilities; //!< The link capabilities
817  uint8_t adapterNo; //!< The adapter that has the port
818  uint8_t Reserved1[3];
819  uint8_t numSensors; //!< The number of sensors on this port
820  uint8_t Reserved2[3];
821  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port
822  uint8_t Reserved3[3];
823  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port
824  uint8_t Reserved4[3];
825 
826  /**
827  * NIM model information
828  */
829  enum NtNimIdentifier_e nim_id; //!< NIM identifier
830  uint8_t vendor_name[17]; //!< NIM Vendor name
831  uint8_t product_no[17]; //!< NIM product number
832  uint8_t serial_no[17]; //!< NIM serial number
833  uint8_t date[9]; //!< NIM vendors manufacturing date
834  uint8_t revision[5]; //!< NIM vendor revision
835  uint8_t power_level_req; //!< NIM required power level
836  uint8_t power_level_curr; //!< NIM current power level
837  struct NtNIMLinkLength_s link_length;
838 
839  /**
840  * Adapter information
841  */
842  struct NtInfoAdapter_v3_s adapterInfo; // Adapter information
843  /**
844  * Bypass port information
845  */
846  struct NtBypassPortInfo_s bypass; // Bypass port information
847 };
848 
849 /**
850  * NT_INFO_CMD_READ_PORT_V3 specific data.
851  * The portNo must be initialized for the relevant port.
852  */
853 struct NtInfoCmdPort_v3_s {
854  uint8_t portNo; //!< The port to query
855  uint8_t Reserved1[3];
856  struct NtInfoPort_v3_s data; //!< The port data
857 };
858 
859 
860 /***********************************************************************************************/
861 /* Port info version 4 */
862 /***********************************************************************************************/
863 #define NT_INFO_CMD_READ_PORT_V4 NT_INFO_CMD_READ_COMPAT_14 //!< Port info - the port state, speed and duplex
864 
865 
866 /**
867  * This structure will return the port specific information version 3.
868  * Must be a mirror of NtInfoPort_v3_s with version 4 variables added
869  * to the bottom.
870  */
871 struct NtInfoPort_v4_s {
872  enum NtPortType_e type; //!< The interface type
873  enum NtLinkState_e state; //!< The port up or down
874  enum NtLinkSpeed_e speed; //!< The interface speed
875  enum NtLinkDuplex_e duplex; //!< The duplex mode
876  int32_t flow; //!< 0 = no flow control, 1 = flow control
877  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX
878  uint8_t macAddress[6]; //!< The MAC address of the interface
879  uint16_t maxFrameSize; //!< The current maximum frame size
880  /**
881  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,
882  * if only 100 M full duplex is available, the capabilities would
883  * show:
884  * halfDuplexMask=0.
885  * fullDuplexMask=NT_LINK_SPEED_100M.
886  * Other capabilities are min/max transmit sizes.
887  */
888  struct NtLinkCapabilities_s capabilities; //!< The link capabilities
889  uint8_t adapterNo; //!< The adapter that has the port
890  uint8_t Reserved1[3];
891  uint8_t numSensors; //!< The number of sensors on this port
892  uint8_t Reserved2[3];
893  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port
894  uint8_t Reserved3[3];
895  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port
896  uint8_t Reserved4[3];
897 
898  /**
899  * NIM model information
900  */
901  enum NtNimIdentifier_e nim_id; //!< NIM identifier
902  uint8_t vendor_name[17]; //!< NIM Vendor name
903  uint8_t product_no[17]; //!< NIM product number
904  uint8_t serial_no[17]; //!< NIM serial number
905  uint8_t date[9]; //!< NIM vendors manufacturing date
906  uint8_t revision[5]; //!< NIM vendor revision
907  uint8_t power_level_req; //!< NIM required power level
908  uint8_t power_level_curr; //!< NIM current power level
909  struct NtNIMLinkLength_s link_length;
910 
911  /**
912  * Adapter information
913  */
914  struct NtInfoAdapter_v4_s adapterInfo; // Adapter information
915  /**
916  * Bypass port information
917  */
918  struct NtBypassPortInfo_s bypass; // Bypass port information
919 };
920 
921 
922 /**
923  * NT_INFO_CMD_READ_PORT_V4 specific data.
924  * The portNo must be initialized for the relevant port.
925  */
926 struct NtInfoCmdPort_v4_s {
927  uint8_t portNo; //!< The port to query
928  uint8_t Reserved1[3];
929  struct NtInfoPort_v4_s data; //!< The port data
930 };
931 
932 
933 /***********************************************************************************************/
934 /* Port info version 5 */
935 /***********************************************************************************************/
936 #define NT_INFO_CMD_READ_PORT_V5 NT_INFO_CMD_READ_COMPAT_16 //!< Port info - the port state, speed and duplex
937 
938 /**
939  * This structure will return the port specific information version 5.
940  * Must be a mirror of NtInfoPort_v4_s with version 5 variables added
941  * to the bottom.
942  */
943 struct NtInfoPort_v5_s {
944  enum NtPortType_e type; //!< The interface type
945  enum NtLinkState_e state; //!< The port up or down
946  enum NtLinkSpeed_e speed; //!< The interface speed
947  enum NtLinkDuplex_e duplex; //!< The duplex mode
948  int32_t flow; //!< 0 = no flow control, 1 = flow control
949  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX
950  uint8_t macAddress[6]; //!< The MAC address of the interface
951  uint16_t maxFrameSize; //!< The current maximum frame size
952  /**
953  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,
954  * if only 100 M full duplex is available, the capabilities would
955  * show:
956  * halfDuplexMask=0.
957  * fullDuplexMask=NT_LINK_SPEED_100M.
958  * Other capabilities are min/max transmit sizes.
959  */
960  struct NtLinkCapabilities_s capabilities; //!< The link capabilities
961  uint8_t adapterNo; //!< The adapter that has the port
962  uint8_t Reserved1[3];
963  uint8_t numSensors; //!< The number of sensors on this port
964  uint8_t Reserved2[3];
965  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port
966  uint8_t Reserved3[3];
967  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port
968  uint8_t Reserved4[3];
969 
970  /**
971  * NIM model information
972  */
973  enum NtNimIdentifier_e nim_id; //!< NIM identifier
974  uint8_t vendor_name[17]; //!< NIM Vendor name
975  uint8_t product_no[17]; //!< NIM product number
976  uint8_t serial_no[17]; //!< NIM serial number
977  uint8_t date[9]; //!< NIM vendors manufacturing date
978  uint8_t revision[5]; //!< NIM vendor revision
979  uint8_t power_level_req; //!< NIM required power level
980  uint8_t power_level_curr; //!< NIM current power level
981  struct NtNIMLinkLength_s link_length;
982 
983  /**
984  * Adapter information
985  */
986  struct NtInfoAdapter_v5_s adapterInfo; // Adapter information
987  /**
988  * Bypass port information
989  */
990  struct NtBypassPortInfo_s bypass; // Bypass port information
991 };
992 
993 
994 /**
995  * NT_INFO_CMD_READ_PORT_V5 specific data.
996  * The portNo must be initialized for the relevant port.
997  */
998 struct NtInfoCmdPort_v5_s {
999  uint8_t portNo; //!< The port to query
1000  uint8_t Reserved1[3];
1001  struct NtInfoPort_v5_s data; //!< The port data
1002 };
1003 
1004 
1005 /***********************************************************************************************/
1006 /* Port info version 6 */
1007 /***********************************************************************************************/
1008 #define NT_INFO_CMD_READ_PORT_V6 NT_INFO_CMD_READ_COMPAT_18 //!< Port info - the port state, speed and duplex
1009 
1010 /**
1011  * This structure will return the port specific information version 6.
1012  * Must be a mirror of NtInfoPort_v5_s with version 6 variables added
1013  * to the bottom.
1014  */
1015 struct NtInfoPort_v6_s {
1016  enum NtPortType_e type; //!< The interface type
1017  enum NtLinkState_e state; //!< The port up or down
1018  enum NtLinkSpeed_e speed; //!< The interface speed
1019  enum NtLinkDuplex_e duplex; //!< The duplex mode
1020  int32_t flow; //!< 0 = no flow control, 1 = flow control
1021  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX
1022  uint8_t macAddress[6]; //!< The MAC address of the interface
1023  uint16_t maxFrameSize; //!< The current maximum frame size
1024  /**
1025  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,
1026  * if only 100 M full duplex is available, the capabilities would
1027  * show:
1028  * halfDuplexMask=0.
1029  * fullDuplexMask=NT_LINK_SPEED_100M.
1030  * Other capabilities are min/max transmit sizes.
1031  */
1032  struct NtLinkCapabilities_s capabilities; //!< The link capabilities
1033  uint8_t adapterNo; //!< The adapter that has the port
1034  uint8_t Reserved1[3];
1035  uint8_t numSensors; //!< The number of sensors on this port
1036  uint8_t Reserved2[3];
1037  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port
1038  uint8_t Reserved3[3];
1039  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port
1040  uint8_t Reserved4[3];
1041 
1042  /**
1043  * NIM model information
1044  */
1045  enum NtNimIdentifier_e nim_id; //!< NIM identifier
1046  uint8_t vendor_name[17]; //!< NIM Vendor name
1047  uint8_t product_no[17]; //!< NIM product number
1048  uint8_t serial_no[17]; //!< NIM serial number
1049  uint8_t date[9]; //!< NIM vendors manufacturing date
1050  uint8_t revision[5]; //!< NIM vendor revision
1051  uint8_t power_level_req; //!< NIM required power level
1052  uint8_t power_level_curr; //!< NIM current power level
1053  struct NtNIMLinkLength_s link_length;
1054 
1055  /**
1056  * Adapter information
1057  */
1058  struct NtInfoAdapter_v5_s adapterInfo; // Adapter information
1059  /**
1060  * Bypass port information
1061  */
1062  struct NtBypassPortInfo_s bypass; // Bypass port information
1063  uint32_t statusMask; //!< Adapter status mask holds information on how the port is configured at startup
1064 };
1065 
1066 /**
1067  * NT_INFO_CMD_READ_PORT_V6 specific data.
1068  * The portNo must be initialized for the relevant port.
1069  */
1070 struct NtInfoCmdPort_v6_s {
1071  uint8_t portNo; //!< The port to query
1072  uint8_t Reserved1[3];
1073  struct NtInfoPort_v6_s data; //!< The port data
1074 };
1075 
1076 /***********************************************************************************************/
1077 /* Port info version 7 */
1078 /***********************************************************************************************/
1079 #define NT_INFO_CMD_READ_PORT_V7 NT_INFO_CMD_READ_COMPAT_20 //!< Port info - the port state, speed and duplex
1080 
1081 /**
1082  * This structure will return the port specific information version 7.
1083  * Must be a mirror of NtInfoPort_v6_s with version 7 variables added
1084  * to the bottom.
1085  */
1086 struct NtInfoPort_v7_s {
1087  enum NtPortType_e type; //!< The interface type
1088  enum NtLinkState_e state; //!< The port up or down
1089  enum NtLinkSpeed_e speed; //!< The interface speed
1090  enum NtLinkDuplex_e duplex; //!< The duplex mode
1091  int32_t flow; //!< 0 = no flow control, 1 = flow control
1092  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX
1093  uint8_t macAddress[6]; //!< The MAC address of the interface
1094  uint16_t maxFrameSize; //!< The current maximum frame size
1095  /**
1096  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,
1097  * if only 100 M full duplex is available, the capabilities would
1098  * show:
1099  * halfDuplexMask=0.
1100  * fullDuplexMask=NT_LINK_SPEED_100M.
1101  * Other capabilities are min/max transmit sizes.
1102  */
1103  struct NtLinkCapabilities_s capabilities; //!< The link capabilities
1104  uint8_t adapterNo; //!< The adapter that has the port
1105  uint8_t Reserved1[3];
1106  uint8_t numSensors; //!< The number of sensors on this port
1107  uint8_t Reserved2[3];
1108  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port
1109  uint8_t Reserved3[3];
1110  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port
1111  uint8_t Reserved4[3];
1112 
1113  /**
1114  * NIM model information
1115  */
1116  enum NtNimIdentifier_e nim_id; //!< NIM identifier
1117  uint8_t vendor_name[17]; //!< NIM Vendor name
1118  uint8_t product_no[17]; //!< NIM product number
1119  uint8_t serial_no[17]; //!< NIM serial number
1120  uint8_t date[9]; //!< NIM vendors manufacturing date
1121  uint8_t revision[5]; //!< NIM vendor revision
1122  uint8_t power_level_req; //!< NIM required power level
1123  uint8_t power_level_curr; //!< NIM current power level
1124  struct NtNIMLinkLength_s link_length;
1125 
1126  /**
1127  * Adapter information
1128  */
1129  struct NtInfoAdapter_v6_s adapterInfo; // Adapter information
1130  /**
1131  * Bypass port information
1132  */
1133  struct NtBypassPortInfo_s bypass; // Bypass port information
1134  uint32_t statusMask; //!< Adapter status mask holds information on how the port is configured at startup
1135 };
1136 
1137 
1138 /***********************************************************************************************/
1139 /* Port info version 8 */
1140 /***********************************************************************************************/
1141 #define NT_INFO_CMD_READ_PORT_V8 NT_INFO_CMD_READ_COMPAT_24 //!< Port info - the port state, speed and duplex
1142 /**
1143  * This structure will return the port specific information version 8.
1144  * Must be a mirror of NtInfoPort_v7_s with version 8 variables added
1145  * to the bottom.
1146  */
1147 struct NtInfoPort_v8_s {
1148  enum NtPortType_e type; //!< The interface type
1149  enum NtLinkState_e state; //!< The port up or down
1150  enum NtLinkSpeed_e speed; //!< The interface speed
1151  enum NtLinkDuplex_e duplex; //!< The duplex mode
1152  int32_t flow; //!< 0 = no flow control, 1 = flow control
1153  enum NtLinkMDI_e mdi; //!< 1 = auto, 2 = MDI, 4 = MDIX
1154  uint8_t macAddress[6]; //!< The MAC address of the interface
1155  uint16_t maxFrameSize; //!< The current maximum frame size
1156  /**
1157  * Capabilities reflect what the port is capable of, that is, what speed/duplex is possible. For example,
1158  * if only 100 M full duplex is available, the capabilities would
1159  * show:
1160  * halfDuplexMask=0.
1161  * fullDuplexMask=NT_LINK_SPEED_100M.
1162  * Other capabilities are min/max transmit sizes.
1163  */
1164  struct NtLinkCapabilities_s capabilities; //!< The link capabilities
1165  uint8_t adapterNo; //!< The adapter that has the port
1166  uint8_t Reserved1[3];
1167  uint8_t numSensors; //!< The number of sensors on this port
1168  uint8_t Reserved2[3];
1169  uint8_t numLevel1Sensors; //!< Number of level 1 sensors on this port
1170  uint8_t Reserved3[3];
1171  uint8_t numLevel2Sensors; //!< Number of level 2 sensors on this port
1172  uint8_t Reserved4[3];
1173 
1174  /**
1175  * NIM model information
1176  */
1177  enum NtNimIdentifier_e nim_id; //!< NIM identifier
1178  uint8_t vendor_name[17]; //!< NIM Vendor name
1179  uint8_t product_no[17]; //!< NIM product number
1180  uint8_t serial_no[17]; //!< NIM serial number
1181  uint8_t date[9]; //!< NIM vendors manufacturing date
1182  uint8_t revision[5]; //!< NIM vendor revision
1183  uint8_t power_level_req; //!< NIM required power level
1184  uint8_t power_level_curr; //!< NIM current power level
1185  struct NtNIMLinkLength_s link_length;
1186  /**
1187  * Adapter information
1188  */
1189  struct NtInfoAdapter_v6_s adapterInfo; // Adapter information
1190  /**
1191  * Bypass port information
1192  */
1193  struct NtBypassPortInfo_s bypass; // Bypass port information
1194  uint32_t statusMask; //!< Adapter status mask holds information on how the port is configured at startup
1195  NtPortFec_t fecState; //!< The state of Forward Error Correction if applicable
1196 };
1197 
1198 
1199 /**
1200  * NT_INFO_CMD_READ_PORT_V7 specific data.
1201  * The portNo must be initialized for the relevant port.
1202  */
1203 struct NtInfoCmdPort_v7_s {
1204  uint8_t portNo; //!< The port to query
1205  uint8_t Reserved1[3];
1206  struct NtInfoPort_v7_s data; //!< The port data
1207 };
1208 
1209 /**
1210  * NT_INFO_CMD_READ_PORT_V8 specific data.
1211  * The portNo must be initialized for the relevant port.
1212  */
1213 struct NtInfoCmdPort_v8_s {
1214  uint8_t portNo; //!< The port to query
1215  uint8_t Reserved1[3];
1216  struct NtInfoPort_v8_s data; //!< The port data
1217 };
1218 
1219 
1220 /***********************************************************************************************/
1221 /* Time sync version 0 */
1222 /***********************************************************************************************/
1223 #define NT_INFO_CMD_READ_TIMESYNC NT_INFO_CMD_READ_COMPAT_2 //!< Time sync info - the time sync connector and time sync data
1224 
1225 struct NtInfoTimeSync_s {
1226  uint32_t timeSyncSupported; //!< Is the time sync supported by this adapter
1227  uint32_t timeSyncProtocol; //!< The time sync protocol
1228  uint32_t timeSyncPpsEnable; //!< The time sync PPS enable
1229  uint32_t timeSyncConnectorIn; //!< The time sync input connector
1230  uint32_t timeSyncConnectorOut; //!< The time sync output connectors
1231  uint32_t timeSyncConnectorRepeat; //!< The time sync repeater connectors
1232  uint32_t timeSyncTimeJumpThreshold; //!< The time sync time jump threshold in seconds
1233  uint32_t timeSyncTimeOffset; //!< The time sync offset in nanoseconds
1234  uint64_t timeSyncPpsSampled; //!< The sampled PPS time (0 if not applicable)
1235  int64_t timeSyncTimeSkew; //!< The time skew
1236  uint32_t timeSyncStatus; //!< The time sync status
1237 };
1238 
1239 /**
1240  * NT_INFO_CMD_READ_TIMESYNC specific data.
1241  * The adapterNo must be initialized for the relevant adapter.
1242  */
1243 struct NtInfoCmdTimeSync_s {
1244  uint8_t adapterNo; //!< The adapter to query
1245  uint8_t Reserved1[3];
1246  struct NtInfoTimeSync_s data; //!< The time sync data
1247 };
1248 
1249 #define NT_INFO_CMD_READ_TIMESYNC_V1 NT_INFO_CMD_READ_COMPAT_4 //!< Time sync info - the time sync connector and time sync data
1250 
1251 /**
1252  * Time sync status
1253  */
1254 enum NtTimeSyncStatus_e {
1255  NT_TIMESYNC_STATUS_NONE = 0, //!< Time sync status unused
1256  NT_TIMESYNC_STATUS_SIGNAL_LOST, //!< Time sync signal lost (NT and PPS)
1257  NT_TIMESYNC_STATUS_SIGNAL_PRESENT, //!< Time sync signal present (NT and PPS)
1258  NT_TIMESYNC_STATUS_OS_SYNCING, //!< OS time sync synching (OS only)
1259  NT_TIMESYNC_STATUS_OS_IN_SYNC, //!< OS time sync in synchronization (OS only)
1260 };
1261 
1262 /**
1263  * Time sync OS Failover status
1264  */
1265 enum NtTimeSyncOSFailoverStatus_e {
1266  NT_TIMESYNC_OS_FAILOVER_STATUS_DISABLED = 0,
1267  NT_TIMESYNC_OS_FAILOVER_STATUS_INIT = 1,
1268  NT_TIMESYNC_OS_FAILOVER_STATUS_WAITING = 2,
1269  NT_TIMESYNC_OS_FAILOVER_STATUS_ACTIVE = 3,
1270 };
1271 
1272 /**
1273  * Time sync specific info V1
1274  */
1275 struct NtInfoTimeSync_v1_s {
1276  uint32_t timeSyncSupported; //!< Is the time sync supported by this adapter
1277  enum NtTimeSyncProtocol_e timeSyncProtocol; //!< The time sync protocol
1278  enum NtTimeSyncPpsStatus_e timeSyncPpsEnable; //!< The time sync PPS enable
1279  uint32_t timeSyncConnectorIn; //!< The time sync input connector
1280  uint32_t timeSyncConnectorOut; //!< The time sync output connectors
1281  uint32_t timeSyncConnectorRepeat; //!< The time sync repeater connectors
1282  uint32_t timeSyncTimeJumpThreshold; //!< The time sync time jump threshold in seconds
1283  uint32_t timeSyncTimeOffset; //!< The time sync offset in nanoseconds
1284  uint64_t timeSyncPpsSampled; //!< The sampled PPS time (0 if not applicable)
1285  int64_t timeSyncTimeSkew; //!< The time skew
1286  enum NtTimeSyncStatus_e timeSyncStatus; //!< The time sync status
1287  uint32_t osTimeSyncFailoverEnable; //!< The OS time sync failover enable
1288  uint32_t osTimeSyncFailoverStatus; //!< The OS time sync failover status
1289  uint32_t highFrequencySampling; //!< The high frequency sampling status
1290  uint64_t adapterTime; //!< The sampled adapter time
1291  uint64_t externalTime; //!< The sampled external time
1292  uint32_t timeSyncConnectorPpsOut; //!< The time sync PPS out connector
1293 };
1294 /**
1295  * NT_INFO_CMD_READ_TIMESYNC_V1 specific data.
1296  * The adapterNo must be initialized for the relevant adapter.
1297  */
1298 struct NtInfoCmdTimeSync_v1_s {
1299  uint8_t adapterNo; //!< The adapter to query
1300  uint8_t Reserved1[3];
1301  struct NtInfoTimeSync_v1_s data; //!< The time sync data
1302 };
1303 
1304 
1305 #define NT_INFO_CMD_READ_TIMESYNC_V2 NT_INFO_CMD_READ_COMPAT_10
1306 
1307 /**
1308  * Time syncronization specific info
1309  */
1310 struct NtInfoTimeSync_v2_s {
1311  uint32_t timeSyncSupported; //!< Is time sync supported by this adapter
1312  uint32_t ptpSupported; //!< Is PTP time sync available on this adapter
1313 
1314  NtTimeSyncConnectorSetting_t timeSyncConnectorExt1; //!< Timesync connector Ext1 setting
1315  NtTimeSyncConnectorSetting_t timeSyncConnectorInt1; //!< Timesync connector Int1 setting
1316  NtTimeSyncConnectorSetting_t timeSyncConnectorInt2; //!< Timesync connector Int2 setting
1317  enum NtTimeSyncReference_e tsRefPrio[4]; //!< Timesync source reference priority list
1318  enum NtTimeSyncReference_e timeRef; //!< The current time reference
1319  enum NtTimeSyncFreqReference_e tsFreqRefPrio[4]; //!< Timesync frequency reference priority list
1320  enum NtTimeSyncFreqReference_e freqRef; //!< The current frequency reference
1321  uint32_t timeSyncNTTSInSyncLimit; //!< The configured NT-TS in-sync limit
1322  uint32_t timeSyncOSInSyncLimit; //!< The configured OS in-sync limit
1323  uint32_t timeSyncPPSInSyncLimit; //!< The configured PPS in-sync limit
1324  uint32_t timeSyncPTPInSyncLimit; //!< The configured PTP in-sync limit
1325  enum NtTimeSyncInSyncStatus_e timeSyncInSyncStatus; //!< The timestamp clock time in-sync/out-of-sync status
1326  enum NtTimeSyncConStatus_e timeSyncCurrentConStatus; //!< The current time sync connector status
1327  enum NtTimeSyncPpsStatus_e timeSyncPpsEnable; //!< The time sync PPS enable. Activated by an application
1328  enum NtTimeSyncPpsSyncMode_e timeSyncPpsSyncMode; //!< When current timeref is PpsIn, this is the sync mode status
1329  uint32_t timeSyncClockAdjustmentMode; //!< The timesync timestamp clock adjustment mode
1330  /* timeSyncClockAdjustmentMode 2 only */
1331  uint32_t timeSyncHardReset; //!< If hard reset of clock is allowed (time jumps)
1332  /* timeSyncClockAdjustmentMode 1 only */
1333  uint32_t timeSyncTimeJumpThreshold; //!< The time sync time jump threshold in seconds
1334 
1335  uint32_t timeSyncTimeOffset; //!< The time sync offset in nanoseconds. Used for NT-TS and PPS caple delay compensation
1336  uint64_t timeSyncPpsSampled; //!< The sampled PPS time. In ns since 1/1 1970 (unix epoch). if NATIVE timestamp format is configured, the epoch is user defined). Note that timeSyncPpsEnable must be true for this parameter to become valid.
1337  int64_t timeSyncTimeSkew; //!< The time skew in ns (0 if not syncing to a time reference). If OS time sync is configured 1us is the resolution, thus skew of 0 means a skew of <1000ns
1338  uint32_t highFrequencySampling; //!< The high frequency sampling status
1339  struct NtInfoTimeSyncSample_s sample[7]; //!< Timestamp sample sets. @ref NtTimeSyncSamplingSrc_e
1340 };
1341 
1342 /**
1343  * NT_INFO_CMD_READ_TIMESYNC_V2 specific data.
1344  * The adapterNo must be initialized for the relevant adapter.
1345  */
1346 struct NtInfoCmdTimeSync_v2_s {
1347  uint8_t adapterNo; //!< The adapter to query
1348  uint8_t Reserved1[2];
1349  struct NtInfoTimeSync_v2_s data; //!< The time sync data
1350 };
1351 
1352 
1353 #define NT_INFO_CMD_READ_TIMESYNC_V3 NT_INFO_CMD_READ_COMPAT_21
1354 
1355 
1356 struct NtInfoTimeSync_v3_s {
1357  uint32_t timeSyncSupported; //!< Is time sync supported by this adapter
1358  uint32_t ptpSupported; //!< Is PTP time sync available on this adapter
1359 
1360  NtTimeSyncConnectorSetting_t timeSyncConnectorExt1; //!< Timesync connector Ext1 setting
1361  NtTimeSyncConnectorSetting_t timeSyncConnectorInt1; //!< Timesync connector Int1 setting
1362  NtTimeSyncConnectorSetting_t timeSyncConnectorInt2; //!< Timesync connector Int2 setting
1363  enum NtTimeSyncReference_e tsRefPrio[4]; //!< Timesync source reference priority list
1364  enum NtTimeSyncReference_e timeRef; //!< The current time reference
1365  enum NtTimeSyncFreqReference_e tsFreqRefPrio[4]; //!< Timesync frequency reference priority list
1366  enum NtTimeSyncFreqReference_e freqRef; //!< The current frequency reference
1367  uint32_t timeSyncNTTSInSyncLimit; //!< The configured NT-TS in-sync limit
1368  uint32_t timeSyncOSInSyncLimit; //!< The configured OS in-sync limit
1369  uint32_t timeSyncPPSInSyncLimit; //!< The configured PPS in-sync limit
1370  uint32_t timeSyncPTPInSyncLimit; //!< The configured PTP in-sync limit
1371  enum NtTimeSyncInSyncStatus_e timeSyncInSyncStatus; //!< The timestamp clock time in-sync/out-of-sync status
1372  enum NtTimeSyncConStatus_e timeSyncCurrentConStatus; //!< The current time sync connector status
1373  enum NtTimeSyncPpsStatus_e timeSyncPpsEnable; //!< The time sync PPS enable. Activated by an application
1374  enum NtTimeSyncPpsSyncMode_e timeSyncPpsSyncMode; //!< When current timeref is PpsIn, this is the sync mode status
1375  uint32_t timeSyncClockAdjustmentMode; //!< The time sync timestamp clock adjustment mode
1376  /* timeSyncClockAdjustmentMode 2 only */
1377  uint32_t timeSyncHardReset; //!< If hard reset of clock is allowed (time jumps)
1378  /* timeSyncClockAdjustmentMode 1 only */
1379  uint32_t timeSyncTimeJumpThreshold; //!< The time sync time jump threshold in seconds
1380 
1381  uint32_t timeSyncTimeOffset; //!< The time sync offset in nanoseconds. Used for NT-TS and PPS caple delay compensation
1382  uint64_t timeSyncPpsSampled; //!< The sampled PPS time. In ns since 1/1 1970 (unix epoch). if NATIVE timestamp format is configured, the epoch is user defined). Note that timeSyncPpsEnable must be true for this parameter to become valid
1383  int64_t timeSyncTimeSkew; //!< The time skew in ns (0 if not syncing to a time reference)
1384  uint32_t highFrequencySampling; //!< The high frequency sampling status
1385  struct NtInfoTimeSyncSample_s sample[7]; //!< Timestamp sample sets. @ref NtTimeSyncSamplingSrc_e
1386 
1387  int64_t timeSyncClockRateAdjustment; //!< The current clock rate adjustment imposed on the TS clock to synchronize to the referenced clock in nanoseconds per second. This is only supported on newer Gen2 adapters (FPGA version must be 46 or above)
1388 
1389  /* Server OS clock synchronization to TS clock */
1390  uint32_t timeSyncAdapterToOSSyncEnabled; //!< Non-zero if this adapter is configured to synchronize the server OS clock
1391  int64_t timeSyncOSClockOffset; //!< The latest read OS clock offset to the adapter TS clock
1392  int64_t timeSyncOSClockRateAdjustment; //!< The current clock rate adjustment imposed on the server OS clock to synchronize to the adapter TS clock.
1393 };
1394 
1395 /**
1396  * NT_INFO_CMD_READ_TIMESYNC_V3 specific data.
1397  * The adapterNo must be initialized for the relevant adapter.
1398  */
1399 struct NtInfoCmdTimeSync_v3_s {
1400  uint8_t adapterNo; //!< The adapter to query
1401  uint8_t Reserved1[2];
1402  struct NtInfoTimeSync_v3_s data; //!< The time sync data
1403 };
1404 
1405 
1406 /***********************************************************************************************/
1407 /* Hostbuffer info version 0 */
1408 /***********************************************************************************************/
1409 #define NT_INFO_CMD_READ_HOSTBUFFER NT_INFO_CMD_READ_COMPAT_3 //!< Host buffer info - the NUMA node, size and feed
1410 /**
1411  * NT_INFO_CMD_READ_PORT_V1 specific data.
1412  * The portNo must be initialized for the relevant port.
1413  */
1414 struct NtInfoHostBuffer_s {
1415  uint8_t numaNode; //!< The NUMA node on which the host buffer resides
1416  uint8_t Reserved1[3];
1417  uint32_t size; //!< The size of the host buffer in bytes
1418  uint32_t feed; //!< The feed index per adapter and type
1419 };
1420 
1421 /**
1422  * NT_INFO_CMD_READ_HOSTBUFFER specific data.
1423  * The adapterNo, hostBufferNo and hostBufferType must be initialized for the relevant adapter, host buffer number and host buffer type.
1424  */
1425 struct NtInfoCmdHostBuffer_s {
1426  uint8_t adapterNo; //!< The adapter to query
1427  uint8_t Reserved1[3];
1428  uint32_t hostBufferNo; //!< The host buffer to query
1429  enum NtNetHostBufferType_e hostBufferType; //!< The host buffer type, that is, CAPTURE or TX
1430  struct NtInfoHostBuffer_s data; //!< The host buffer data
1431 };
1432 
1433 /***********************************************************************************************/
1434 
1435 /***********************************************************************************************/
1436 /* PTP info version 1 */
1437 /***********************************************************************************************/
1438 #define NT_INFO_CMD_READ_PTP_V1 NT_INFO_CMD_READ_COMPAT_15
1439 
1440 /**
1441  * IEEE 1588 PTP time synchronization statistics
1442  */
1443 struct NtPTPSyncStat_s {
1444  uint64_t samples; //!< The number of samples the statistics are calculated on
1445  int64_t jitter; //!< The peak to peak jitter measured
1446  int64_t skew; //!< Latest measured clock skew
1447  int64_t min; //!< The minimum clock skew measured
1448  int64_t max; //!< The maximum clock skew measured
1449  int64_t mean; //!< The calculated mean clock skew (skew-sum/samples)
1450  double stdDevSqr; //!< Calculated squared standard deviation of clock skew when slave, otherwise 0
1451 };
1452 
1453 /**
1454  * PTP information structure
1455  */
1456 struct NtInfoPTP_v1_s {
1457  bool enabled; //!< Is PTP stack configured to be used (slave, master or ptp pps sampling)
1458  struct NtPTPTimestamp_s ts; //!< Timestamp at this info retrieval
1459  struct NtPTPPort_s ptpPort; //!< PTP port information structure
1460  struct NtPTPDataSets_s ptpDataSets; //!< PTP data sets (according to IEEE1588-2008 spec.)
1461  struct NtPTPPortStat_s ptpPortStat; //!< PTP ethernet port statistics
1462  struct NtPTPSyncStat_s stat; //!< In slave mode, stat holds the timesync statistics
1463  struct NtPTPImplCfg_s ptpImplCfg; //!< PTP implementational configuration settings
1464 };
1465 
1466 /**
1467  * NT_INFO_CMD_READ_PTP specific data.
1468  */
1469 struct NtInfoCmdPTP_v1_s {
1470  uint8_t adapterNo; //!< The adapter to query
1471  uint8_t Reserved1[2];
1472  struct NtInfoPTP_v1_s data; //!< Query PTP information structure
1473 };
1474 
1475 
1476 /***********************************************************************************************/
1477 /* PTP info version 0 */
1478 /***********************************************************************************************/
1479 #define NT_INFO_CMD_READ_PTP NT_INFO_CMD_READ_COMPAT_9
1480 
1481 struct NtInfoPTP_s {
1482  bool enabled; //!< Is PTP stack configured to be used (slave, master or ptp pps sampling)
1483  struct NtPTPTimestamp_s ts; //!< Timestamp at this info retrieval
1484  struct NtPTPPort_s ptpPort; //!< PTP port information structure
1485  struct NtPTPDataSets_s ptpDataSets; //!< PTP data sets (according to IEEE1588-2008 spec.)
1486  struct NtPTPPortStat_s ptpPortStat; //!< PTP ethernet port statistics
1487  struct NtPTPSyncStat_s stat; //!< In slave mode, stat holds the timesync statistics
1488 };
1489 /**
1490  * NT_INFO_CMD_READ_PTP specific data.
1491  */
1492 struct NtInfoCmdPTP_s {
1493  uint8_t adapterNo; //!< The adapter to query
1494  uint8_t Reserved1[2];
1495  struct NtInfoPTP_s data; //!< Query PTP information structure
1496 };
1497 
1498 
1499 /***********************************************************************************************/
1500 /* ProductInfo version 0 */
1501 /***********************************************************************************************/
1502 #define NT_INFO_CMD_READ_PRODUCT_INFO NT_INFO_CMD_READ_COMPAT_19
1503 
1504 typedef struct NtInfoProductInfo_s {
1505  enum NtProductInfoType_e infoType; //!< Information from Gen 1, Gen 2, NTBPE or Gen 3 adapter
1506  char ProductId[32]; //!< Product ID (P/N)
1507  char SerialNo[2][32]; //!< Serial number (only index 0 used on Gen 1 otherwise 0 = main, 1 = front)
1508  char PbaId[2][32]; //!< PBA ID (only index 0 used on Gen 1 otherwise 0 = main, 1 = front)
1509  char AvrId[2][32]; //!< AVR version (only on Gen 2)
1510  char CpldVersion[32]; //!< CPLD Version
1511  char fpgaId1[40]; //!< FPGA Image #0 ID
1512  char fpgaId2[40]; //!< FPGA Image #1 ID
1513 } NtInfoProductInfo_t;
1514 
1515 struct NtInfoReadProductInfo_s {
1516  uint8_t adapterNo; //!< Adapter number to query for product information
1517  NtInfoProductInfo_t data; //!< Product Information returned
1518 };
1519 
1520 /***********************************************************************************************/
1521 /* ProductInfo version 1 */
1522 /***********************************************************************************************/
1523 #define NT_INFO_CMD_READ_PRODUCT_INFO_V1 NT_INFO_CMD_READ_COMPAT_22
1524 
1525 /**
1526  * Structure to read product information version 1
1527  */
1528 typedef struct NtInfoProductInfo_v1_s {
1529  enum NtProductInfoType_e infoType; //!< Information from Gen 1, Gen 2, NTBPE or Gen 3 adapter
1530  char ProductId[32]; //!< Product ID (P/N)
1531  char SerialNo[2][32]; //!< Serial number (only index 0 used on Gen 1 otherwise 0 = main, 1 = front)
1532  char PbaId[2][32]; //!< PBA ID (only index 0 used on Gen 1 otherwise 0 = main, 1 = front)
1533  char AvrId[2][32]; //!< AVR version (only on Gen 2)
1534  char CpldVersion[32]; //!< CPLD Version
1535  char fpgaId1[40]; //!< FPGA Image #0 ID
1536  char fpgaId2[40]; //!< FPGA Image #1 ID
1537  uint16_t customId; //!< Custom ID
1538 } NtInfoProductInfo_v1_t;
1539 
1540 
1541 /**
1542  * Product info
1543  */
1544 struct NtInfoReadProductInfo_v1_s {
1545  uint8_t adapterNo; //!< Adapter number to query for product information
1546  NtInfoProductInfo_v1_t data; //!< Product Information returned
1547 };
1548 
1549 /***********************************************************************************************/
1550 /* Filter usage version 0 */
1551 /***********************************************************************************************/
1552 #define NT_INFO_CMD_READ_FILTERUSAGE NT_INFO_CMD_READ_COMPAT_23
1553 
1554 /**
1555  * Structure to read NTPL filter usage
1556  */
1557 typedef struct NtInfoFilterUsage_s {
1558  int32_t sizeCount; //!< Number of frame length filters used
1559  int32_t protocolCount; //!< Number of protocol filters used
1560  int32_t errorCount; //!< Number of error filters used
1561  int32_t patternCount; //!< Number of data filters used
1562  int32_t dynOffsetCount; //!< Number of dynamic offsets used
1563  int32_t group4PlusCount; //!< Number of group filters used combining 4 patterns with 4 different dynamic offsets
1564  int32_t group8Count; //!< Number of group filters used combining 8 patterns with 2 different dynamic offsets
1565  int32_t ipmatchCount; //!< Number of IP match filters used
1566  int32_t ipmatchListOuter; //!< Number of IP match list outer resources used
1567  int32_t ipmatchListInner; //!< Number of IP match list inner resources used
1568 } NtInfoFilterUsage_t;
1569 
1570 /**
1571  * Filter usage command
1572  */
1573 struct NtInfoCmdFilterUsage_s {
1574  uint8_t adapterNo; //!< Adapter number to query for filter usage
1575  uint8_t Reserved1[3];
1576  uint32_t ntplId; //!< Ntpl ID to query. 0 will retrieve total usage
1577  NtInfoFilterUsage_t data; //!< Filter usage information returned
1578 };
1579 
1580 #endif /* _NT_NTAPI_NO_COMPAT */
1581 #endif /* __STREAM_INFO_COMPAT_H__ */